powerpc:Add support of SPL non-relocation

Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.

To avoid relocation:
	- Move bss_section within SPL range
	- Modify relocate_code()

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/README b/README
index 017a13df4da702175a87ca5be8791691df017d37..52283e22d71ebd63336b16c2826cbaef1492f762 100644 (file)
--- a/README
+++ b/README
@@ -3332,6 +3332,9 @@ FIT uImage format:
                continuing (the hardware starts execution after just
                loading the first page rather than the full 4K).
 
+               CONFIG_SPL_SKIP_RELOCATE
+               Avoid SPL relocation
+
                CONFIG_SPL_NAND_BASE
                Include nand_base.c in the SPL.  Requires
                CONFIG_SPL_NAND_DRIVERS.

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 02f50762c78da2cdf8f8fe991f5744998ac4bf4c..0e3c86a0f8f211e1f667af53280121c29c6294e1 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1652,6 +1652,7 @@ relocate_code:
        mr      r10,r5          /* Save copy of Destination Address     */
 
        GET_GOT
+#ifndef CONFIG_SPL_SKIP_RELOCATE
        mr      r3,r5                           /* Destination Address  */
        lis     r4,CONFIG_SYS_MONITOR_BASE@h            /* Source      Address  */
        ori     r4,r4,CONFIG_SYS_MONITOR_BASE@l
@@ -1742,6 +1743,7 @@ relocate_code:
 
        mtlr    r0
        blr                             /* NEVER RETURNS! */
+#endif
        .globl  in_ram
 in_ram:
 

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 4fad68b40c5262ba6ca25bd1a75af3af8965b343..8453f3a3fe8901f8a768be3a2dce33412a100ebe 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -57,6 +57,16 @@ SECTIONS
        . = ALIGN(8);
        __init_begin = .;
        __init_end = .;
+#ifdef CONFIG_SPL_SKIP_RELOCATE
+       . = ALIGN(4);
+       __bss_start = .;
+       .bss : {
+               *(.sbss*)
+               *(.bss*)
+       }
+       . = ALIGN(4);
+       __bss_end = .;
+#endif
 
 /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
 #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
@@ -86,6 +96,7 @@ SECTIONS
        } = 0xffff
 #endif
 
+#ifndef CONFIG_SPL_SKIP_RELOCATE
        /*
         * Make sure that the bss segment isn't linked at 0x0, otherwise its
         * address won't be updated during relocation fixups.
@@ -100,4 +111,5 @@ SECTIONS
        }
        . = ALIGN(4);
        __bss_end = .;
+#endif
 }