ARC: add defines of some cache and xCCM AUX registers

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 2a1bfc74ec5719fc6504096bb42b84a1df2403ba..ba1f7bac77c77bd5e8d83469e0758bae25847d15 100644 (file)
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -27,6 +27,12 @@
 #define ARC_AUX_IC_PTAG                0x1E
 #endif
 #define ARC_BCR_IC_BUILD       0x77
+#define AUX_AUX_CACHE_LIMIT            0x5D
+#define ARC_AUX_NON_VOLATILE_LIMIT     0x5E
+
+/* ICCM and DCCM auxiliary registers */
+#define ARC_AUX_DCCM_BASE      0x18    /* DCCM Base Addr ARCv2 */
+#define ARC_AUX_ICCM_BASE      0x208   /* ICCM Base Addr ARCv2 */
 
 /* Timer related auxiliary registers */
 #define ARC_AUX_TIMER0_CNT     0x21    /* Timer 0 count */