ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it

For Tegra, the SPL and main U-Boot are concatenated together to form a
single memory image. Hence, the maximum SPL size is the different in
TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
the calculation automatically.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 272c46e06beb63e50ecede8ec6ad066ebb0348d4..5b048e0094ffdaa4207728481fde75ee6a56e894 100644 (file)
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -188,7 +188,8 @@
 #define CONFIG_SPL
 #define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_TEXT_BASE           0x00108000
-#define CONFIG_SPL_MAX_SIZE            0x00004000
+#define CONFIG_SPL_MAX_SIZE            (CONFIG_SYS_TEXT_BASE - \
+                                               CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SYS_SPL_MALLOC_START    0x00090000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x00010000
 #define CONFIG_SPL_STACK               0x000ffffc