am33xx: Enable UART{1,2,3,4,5} pin-mux

If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or on the am335x_evm daughterboard, enable the proper pin-muxing.

Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 5d279ecdbc1952452c93256f86a88f3e76358e49..013ad881f0a082c8f1b044cefff246ac0e5f294e 100644 (file)
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -242,7 +242,24 @@ void s_init(void)
        /* UART softreset */
        u32 regVal;
 
+#ifdef CONFIG_SERIAL1
        enable_uart0_pin_mux();
+#endif /* CONFIG_SERIAL1 */
+#ifdef CONFIG_SERIAL2
+       enable_uart1_pin_mux();
+#endif /* CONFIG_SERIAL2 */
+#ifdef CONFIG_SERIAL3
+       enable_uart2_pin_mux();
+#endif /* CONFIG_SERIAL3 */
+#ifdef CONFIG_SERIAL4
+       enable_uart3_pin_mux();
+#endif /* CONFIG_SERIAL4 */
+#ifdef CONFIG_SERIAL5
+       enable_uart4_pin_mux();
+#endif /* CONFIG_SERIAL5 */
+#ifdef CONFIG_SERIAL6
+       enable_uart5_pin_mux();
+#endif /* CONFIG_SERIAL6 */
 
        regVal = readl(&uart_base->uartsyscfg);
        regVal |= UART_RESET;

diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h
index 7985ab2c14fd1c2b60ea9201e138026646bf20ba..48e112e2303a19be95751deaa186b3e9457aeebb 100644 (file)
--- a/board/ti/am335x/board.h
+++ b/board/ti/am335x/board.h
@@ -44,6 +44,11 @@ struct am335x_baseboard_id {
  * is required on the board.
  */
 void enable_uart0_pin_mux(void);
+void enable_uart1_pin_mux(void);
+void enable_uart2_pin_mux(void);
+void enable_uart3_pin_mux(void);
+void enable_uart4_pin_mux(void);
+void enable_uart5_pin_mux(void);
 void enable_i2c0_pin_mux(void);
 void enable_board_pin_mux(struct am335x_baseboard_id *header);
 #endif

diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 29929791fcc632852766ab49fd2b8b0de69928a2..6a5f23a551c9a08b12ffe81d5b30640d5d6e7006 100644 (file)
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -27,6 +27,36 @@ static struct module_pin_mux uart0_pin_mux[] = {
        {-1},
 };
 
+static struct module_pin_mux uart1_pin_mux[] = {
+       {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},  /* UART1_RXD */
+       {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},              /* UART1_TXD */
+       {-1},
+};
+
+static struct module_pin_mux uart2_pin_mux[] = {
+       {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)},  /* UART2_RXD */
+       {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)},                /* UART2_TXD */
+       {-1},
+};
+
+static struct module_pin_mux uart3_pin_mux[] = {
+       {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)},   /* UART3_RXD */
+       {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)},      /* UART3_TXD */
+       {-1},
+};
+
+static struct module_pin_mux uart4_pin_mux[] = {
+       {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
+       {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)},               /* UART4_TXD */
+       {-1},
+};
+
+static struct module_pin_mux uart5_pin_mux[] = {
+       {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)},  /* UART5_RXD */
+       {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)},              /* UART5_TXD */
+       {-1},
+};
+
 static struct module_pin_mux mmc0_pin_mux[] = {
        {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},  /* MMC0_DAT3 */
        {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},  /* MMC0_DAT2 */
@@ -135,6 +165,30 @@ void enable_uart0_pin_mux(void)
        configure_module_pin_mux(uart0_pin_mux);
 }
 
+void enable_uart1_pin_mux(void)
+{
+       configure_module_pin_mux(uart1_pin_mux);
+}
+
+void enable_uart2_pin_mux(void)
+{
+       configure_module_pin_mux(uart2_pin_mux);
+}
+
+void enable_uart3_pin_mux(void)
+{
+       configure_module_pin_mux(uart3_pin_mux);
+}
+
+void enable_uart4_pin_mux(void)
+{
+       configure_module_pin_mux(uart4_pin_mux);
+}
+
+void enable_uart5_pin_mux(void)
+{
+       configure_module_pin_mux(uart5_pin_mux);
+}
 
 void enable_i2c0_pin_mux(void)
 {