zynq: Move bootmode to headers

These numbers will be reused by SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h
index cd69677729cbf81ad237e1ac64b8477fde37e1f3..1fe044801cf02e4a45f29e488e22c66fecc9daad 100644 (file)
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -21,6 +21,12 @@
 #define ZYNQ_SPI_BASEADDR1             0xE0007000
 #define ZYNQ_DDRC_BASEADDR             0xF8006000
 
+/* Bootmode setting values */
+#define ZYNQ_BM_MASK           0xF
+#define ZYNQ_BM_NOR            0x2
+#define ZYNQ_BM_SD             0x5
+#define ZYNQ_BM_JTAG           0x0
+
 /* Reflect slcr offsets */
 struct slcr_regs {
        u32 scl; /* 0x0 */

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 16d2d99cae08af9f979d43f8191806b7e167ef28..82f2345c956b2bb61ae8398371a8f473c28bace8 100644 (file)
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -12,12 +12,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Bootmode setting values */
-#define ZYNQ_BM_MASK           0x0F
-#define ZYNQ_BM_NOR            0x02
-#define ZYNQ_BM_SD             0x05
-#define ZYNQ_BM_JTAG           0x0
-
 #ifdef CONFIG_FPGA
 Xilinx_desc fpga;