armv8: layerscape: Enabled I-cache for SPL boot

Enable I-cache for SPL boot to boost performance. Earlier MMU was
enabled only for LS2080A and has since been dropped by commit
f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build").

Signed-off-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index dba4b406070194b6a2c363bc82269690dbc41b15..f1d6fd63b995f56a177a4937d892181d82effc3c 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -52,6 +52,7 @@ void spl_board_init(void)
 
 void board_init_f(ulong dummy)
 {
+       icache_enable();
        /* Clear global data */
        memset((void *)gd, 0, sizeof(gd_t));
        board_early_init_f();