Add optional reset control, especially for the Aspeed SOC. For the
hardware without a reset line, the reset assertion/deassertion will be
skipped.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
#include <common.h>
#include <clk.h>
+#include <reset.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
u32 max_speed;
struct clk_bulk clks;
+ struct reset_ctl *reset_ctl;
/* End of RX/TX ring buffer bits. Depend on model */
u32 rxdes0_edorr_mask;
priv->txdes0_edotr_mask = BIT(15);
}
+ priv->reset_ctl = devm_reset_control_get_optional(dev, NULL);
+
return clk_get_bulk(dev, &priv->clks);
}
if (ret)
goto out;
+ if (priv->reset_ctl) {
+ ret = reset_deassert(priv->reset_ctl);
+ if (ret)
+ goto out;
+ }
+
/*
* If DM MDIO is enabled, the MDIO bus will be initialized later in
* dm_eth_phy_connect
free(priv->phydev);
mdio_unregister(priv->bus);
mdio_free(priv->bus);
+ if (priv->reset_ctl)
+ reset_assert(priv->reset_ctl);
clk_release_bulk(&priv->clks);
return 0;