This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Angelo Durgehello <angelo.dureghello@timesys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
bool "Support M5373EVB"
select M5373
-config TARGET_M54418TWR
- bool "Support M54418TWR"
- select M54418
-
config TARGET_M54451EVB
bool "Support M54451EVB"
select M54451
source "board/freescale/m53017evb/Kconfig"
source "board/freescale/m5329evb/Kconfig"
source "board/freescale/m5373evb/Kconfig"
-source "board/freescale/m54418twr/Kconfig"
source "board/freescale/m54451evb/Kconfig"
source "board/sysam/amcore/Kconfig"
source "board/sysam/stmark2/Kconfig"
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/dts-v1/;
-/include/ "mcf5441x.dtsi"
-
-/ {
- model = "Freescale M54418TWR";
- compatible = "fsl,M54418TWR";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
- status = "okay";
-};
-
-&dspi0 {
- status = "okay";
-};
-
-&fec0 {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
- mii-base = <0>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/dts-v1/;
-/include/ "mcf5441x.dtsi"
-
-/ {
- model = "Freescale M54418TWR_nand_mii";
- compatible = "fsl,M54418TWR_nand_mii";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
- status = "okay";
-};
-
-&dspi0 {
- status = "okay";
-};
-
-&fec0 {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
- mii-base = <0>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/dts-v1/;
-/include/ "mcf5441x.dtsi"
-
-/ {
- model = "Freescale M54418TWR_nand_rmii";
- compatible = "fsl,M54418TWR_nand_rmii";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
- status = "okay";
-};
-
-&dspi0 {
- status = "okay";
-};
-
-&fec0 {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
- mii-base = <0>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/dts-v1/;
-/include/ "mcf5441x.dtsi"
-
-/ {
- model = "Freescale M54418TWR_nand_rmii_lowfreq";
- compatible = "fsl,M54418TWR_nand_rmii_lowfreq";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
- status = "okay";
-};
-
-&dspi0 {
- status = "okay";
-};
-
-&fec0 {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
- mii-base = <0>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/dts-v1/;
-/include/ "mcf5441x.dtsi"
-
-/ {
- model = "Freescale M54418TWR_serial_mii";
- compatible = "fsl,M54418TWR_serial_mii";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
- status = "okay";
-};
-
-&dspi0 {
- status = "okay";
-};
-
-&fec0 {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
- mii-base = <0>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/dts-v1/;
-/include/ "mcf5441x.dtsi"
-
-/ {
- model = "Freescale M54418TWR_serial_rmii";
- compatible = "fsl,M54418TWR_serial_rmii";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
- status = "okay";
-};
-
-&dspi0 {
- status = "okay";
-};
-
-&fec0 {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
- mii-base = <0>;
-};
dtb-$(CONFIG_TARGET_M53017EVB) += M53017EVB.dtb
dtb-$(CONFIG_TARGET_M5329EVB) += M5329AFEE.dtb M5329BFEE.dtb
dtb-$(CONFIG_TARGET_M5373EVB) += M5373EVB.dtb
-dtb-$(CONFIG_TARGET_M54418TWR) += M54418TWR.dtb \
- M54418TWR_nand_mii.dtb \
- M54418TWR_nand_rmii.dtb \
- M54418TWR_serial_mii.dtb \
- M54418TWR_serial_rmii.dtb \
- M54418TWR_nand_rmii_lowfreq.dtb
dtb-$(CONFIG_TARGET_M54451EVB) += M54451EVB.dtb \
M54451EVB_stmicro.dtb
dtb-$(CONFIG_TARGET_AMCORE) += amcore.dtb
+++ /dev/null
-if TARGET_M54418TWR
-
-config SYS_CPU
- default "mcf5445x"
-
-config SYS_BOARD
- default "m54418twr"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_CONFIG_NAME
- default "M54418TWR"
-
-endif
+++ /dev/null
-M54418TWR BOARD
-#M: -
-S: Maintained
-F: board/freescale/m54418twr/
-F: include/configs/M54418TWR.h
-F: configs/M54418TWR_defconfig
-F: configs/M54418TWR_nand_mii_defconfig
-F: configs/M54418TWR_nand_rmii_defconfig
-F: configs/M54418TWR_nand_rmii_lowfreq_defconfig
-F: configs/M54418TWR_serial_mii_defconfig
-F: configs/M54418TWR_serial_rmii_defconfig
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0+
-# Copyright 2010-2012 Freescale Semiconductor, Inc.
-# TsiChung Liew (Tsi-Chung.Liew@freescale.com)
-
-obj-y = m54418twr.o
-extra-y += sbf_dram_init.o
-
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2010-2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#include <common.h>
-#include <init.h>
-#include <spi.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <asm/immap.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <linux/delay.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkboard(void)
-{
- /*
- * need to to:
- * Check serial flash size. if 2mb evb, else 8mb demo
- */
- puts("Board: ");
- puts("Freescale MCF54418 Tower System\n");
- return 0;
-};
-
-int dram_init(void)
-{
- u32 dramsize;
-
-#if defined(CONFIG_SERIAL_BOOT)
- /*
- * Serial Boot: The dram is already initialized in start.S
- * only require to return DRAM size
- */
- dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
-#else
- sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
- ccm_t *ccm = (ccm_t *)MMAP_CCM;
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
- pm_t *pm = (pm_t *) MMAP_PM;
- u32 i;
-
- dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
-
- for (i = 0x13; i < 0x20; i++) {
- if (dramsize == (1 << i))
- break;
- }
-
- out_8(&pm->pmcr0, 0x2E);
- out_8(&gpio->mscr_sdram, 1);
-
- clrbits_be16(&ccm->misccr2, CCM_MISCCR2_FBHALF);
- setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK);
-
- out_be32(&sdram->rcrcr, 0x40000000);
- out_be32(&sdram->padcr, 0x01030203);
-
- out_be32(&sdram->cr00, 0x01010101);
- out_be32(&sdram->cr01, 0x00000101);
- out_be32(&sdram->cr02, 0x01010100);
- out_be32(&sdram->cr03, 0x01010000);
- out_be32(&sdram->cr04, 0x00010101);
- out_be32(&sdram->cr06, 0x00010100);
- out_be32(&sdram->cr07, 0x00000001);
- out_be32(&sdram->cr08, 0x01000001);
- out_be32(&sdram->cr09, 0x00000100);
- out_be32(&sdram->cr10, 0x00010001);
- out_be32(&sdram->cr11, 0x00000200);
- out_be32(&sdram->cr12, 0x01000002);
- out_be32(&sdram->cr13, 0x00000000);
- out_be32(&sdram->cr14, 0x00000100);
- out_be32(&sdram->cr15, 0x02000100);
- out_be32(&sdram->cr16, 0x02000407);
- out_be32(&sdram->cr17, 0x02030007);
- out_be32(&sdram->cr18, 0x02000100);
- out_be32(&sdram->cr19, 0x0A030203);
- out_be32(&sdram->cr20, 0x00020708);
- out_be32(&sdram->cr21, 0x00050008);
- out_be32(&sdram->cr22, 0x04030002);
- out_be32(&sdram->cr23, 0x00000004);
- out_be32(&sdram->cr24, 0x020A0000);
- out_be32(&sdram->cr25, 0x0C00000E);
- out_be32(&sdram->cr26, 0x00002004);
- out_be32(&sdram->cr28, 0x00100010);
- out_be32(&sdram->cr29, 0x00100010);
- out_be32(&sdram->cr31, 0x07990000);
- out_be32(&sdram->cr40, 0x00000000);
- out_be32(&sdram->cr41, 0x00C80064);
- out_be32(&sdram->cr42, 0x44520002);
- out_be32(&sdram->cr43, 0x00C80023);
- out_be32(&sdram->cr45, 0x0000C350);
- out_be32(&sdram->cr56, 0x04000000);
- out_be32(&sdram->cr57, 0x03000304);
- out_be32(&sdram->cr58, 0x40040000);
- out_be32(&sdram->cr59, 0xC0004004);
- out_be32(&sdram->cr60, 0x0642C000);
- out_be32(&sdram->cr61, 0x00000642);
- asm("tpf");
-
- out_be32(&sdram->cr09, 0x01000100);
-
- udelay(100);
-#endif
- gd->ram_size = dramsize;
-
- return 0;
-};
-
-int testdram(void)
-{
- return 0;
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Board-specific sbf ddr/sdram init.
- *
- * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
- */
-
-.global sbf_dram_init
-.text
-
-sbf_dram_init:
- move.l #0xFC04002D, %a1
- move.b #46, (%a1) /* DDR */
-
- /* slew settings */
- move.l #0xEC094060, %a1
- move.b #0, (%a1)
-
- /* use vco instead of cpu*2 clock for ddr clock */
- move.l #0xEC09001A, %a1
- move.w #0xE01D, (%a1)
-
- /* DDR settings */
- move.l #0xFC0B8180, %a1
- move.l #0x00000000, (%a1)
- move.l #0x40000000, (%a1)
-
- move.l #0xFC0B81AC, %a1
- move.l #0x01030203, (%a1)
-
- move.l #0xFC0B8000, %a1
- move.l #0x01010101, (%a1)+ /* 0x00 */
- move.l #0x00000101, (%a1)+ /* 0x04 */
- move.l #0x01010100, (%a1)+ /* 0x08 */
- move.l #0x01010000, (%a1)+ /* 0x0C */
- move.l #0x00010101, (%a1)+ /* 0x10 */
- move.l #0xFC0B8018, %a1
- move.l #0x00010100, (%a1)+ /* 0x18 */
- move.l #0x00000001, (%a1)+ /* 0x1C */
- move.l #0x01000001, (%a1)+ /* 0x20 */
- move.l #0x00000100, (%a1)+ /* 0x24 */
- move.l #0x00010001, (%a1)+ /* 0x28 */
- move.l #0x00000200, (%a1)+ /* 0x2C */
- move.l #0x01000002, (%a1)+ /* 0x30 */
- move.l #0x00000000, (%a1)+ /* 0x34 */
- move.l #0x00000100, (%a1)+ /* 0x38 */
- move.l #0x02000100, (%a1)+ /* 0x3C */
- move.l #0x02000407, (%a1)+ /* 0x40 */
- move.l #0x02030007, (%a1)+ /* 0x44 */
- move.l #0x02000100, (%a1)+ /* 0x48 */
- move.l #0x0A030203, (%a1)+ /* 0x4C */
- move.l #0x00020708, (%a1)+ /* 0x50 */
- move.l #0x00050008, (%a1)+ /* 0x54 */
- move.l #0x04030002, (%a1)+ /* 0x58 */
- move.l #0x00000004, (%a1)+ /* 0x5C */
- move.l #0x020A0000, (%a1)+ /* 0x60 */
- move.l #0x0C00000E, (%a1)+ /* 0x64 */
- move.l #0x00002004, (%a1)+ /* 0x68 */
- move.l #0x00000000, (%a1)+ /* 0x6C */
- move.l #0x00100010, (%a1)+ /* 0x70 */
- move.l #0x00100010, (%a1)+ /* 0x74 */
- move.l #0x00000000, (%a1)+ /* 0x78 */
- move.l #0x07990000, (%a1)+ /* 0x7C */
- move.l #0xFC0B80A0, %a1
- move.l #0x00000000, (%a1)+ /* 0xA0 */
- move.l #0x00C80064, (%a1)+ /* 0xA4 */
- move.l #0x44520002, (%a1)+ /* 0xA8 */
- move.l #0x00C80023, (%a1)+ /* 0xAC */
- move.l #0xFC0B80B4, %a1
- move.l #0x0000C350, (%a1) /* 0xB4 */
- move.l #0xFC0B80E0, %a1
- move.l #0x04000000, (%a1)+ /* 0xE0 */
- move.l #0x03000304, (%a1)+ /* 0xE4 */
- move.l #0x40040000, (%a1)+ /* 0xE8 */
- move.l #0xC0004004, (%a1)+ /* 0xEC */
- move.l #0x0642C000, (%a1)+ /* 0xF0 */
- move.l #0x00000642, (%a1)+ /* 0xF4 */
- move.l #0xFC0B8024, %a1
- tpf
- move.l #0x01000100, (%a1) /* 0x24 */
-
- move.l #0x2000, %d1
- bsr asm_delay
-
- rts
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x40000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="M54418TWR"
-CONFIG_TARGET_M54418TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="-> "
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_USE_ENV_SPI_CS=y
-CONFIG_ENV_SPI_CS=1
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_DM_ETH=y
-CONFIG_MCFFEC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_CF_SPI=y
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii"
-CONFIG_TARGET_M54418TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000"
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="-> "
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_DM_ETH=y
-CONFIG_MCFFEC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_CF_SPI=y
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii"
-CONFIG_TARGET_M54418TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000"
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="-> "
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_DM_ETH=y
-CONFIG_MCFFEC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_CF_SPI=y
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq"
-CONFIG_TARGET_M54418TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000"
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="-> "
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_DM_ETH=y
-CONFIG_MCFFEC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_CF_SPI=y
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x40000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_mii"
-CONFIG_TARGET_M54418TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000"
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="-> "
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_USE_ENV_SPI_CS=y
-CONFIG_ENV_SPI_CS=1
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_DM_ETH=y
-CONFIG_MCFFEC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_CF_SPI=y
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0x47E00000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x40000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_rmii"
-CONFIG_TARGET_M54418TWR=y
-CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="-> "
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_USE_ENV_SPI_CS=y
-CONFIG_ENV_SPI_CS=1
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_DM_ETH=y
-CONFIG_MCFFEC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_CF_SPI=y
+++ /dev/null
-Freescale MCF54418TWR ColdFire Development Board
-================================================
-
-TsiChung Liew(Tsi-Chung.Liew@freescale.com)
-Created Mar 22, 2012
-===========================================
-
-
-Changed files:
-==============
-
-- board/freescale/m54418twr/m54418twr.c Dram setup
-- board/freescale/m54418twr/Makefile Makefile
-- board/freescale/m54418twr/config.mk config make
-- board/freescale/m54418twr/u-boot.lds Linker description
-- board/freescale/m54418twr/sbf_dram_init.S
- DDR/SDRAM initialization
-
-- arch/m68k/cpu/mcf5445x/cpu.c cpu specific code
-- arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
-- arch/m68k/cpu/mcf5445x/interrupts.c cpu specific interrupt support
-- arch/m68k/cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock
-- arch/m68k/cpu/mcf5445x/Makefile Makefile
-- arch/m68k/cpu/mcf5445x/config.mk config make
-- arch/m68k/cpu/mcf5445x/start.S start up assembly code
-
-- doc/README.m54418twr This readme file
-
-- drivers/net/mcffec.c ColdFire common FEC driver
-- drivers/net/mcfmii.c ColdFire common MII driver
-- drivers/serial/mcfuart.c ColdFire common UART driver
-
-- arch/m68k/include/asm/bitops.h Bit operation function export
-- arch/m68k/include/asm/byteorder.h Byte order functions
-- arch/m68k/include/asm/fec.h FEC structure and definition
-- arch/m68k/include/asm/global_data.h Global data structure
-- arch/m68k/include/asm/immap.h ColdFire specific header file and driver macros
-- arch/m68k/include/asm/immap_5441x.h mcf5441x specific header file
-- arch/m68k/include/asm/io.h io functions
-- arch/m68k/include/asm/m5441x.h mcf5441x specific header file
-- arch/m68k/include/asm/posix_types.h Posix
-- arch/m68k/include/asm/processor.h header file
-- arch/m68k/include/asm/ptrace.h Exception structure
-- arch/m68k/include/asm/rtc.h Realtime clock header file
-- arch/m68k/include/asm/string.h String function export
-- arch/m68k/include/asm/timer.h Timer structure and definition
-- arch/m68k/include/asm/types.h Data types definition
-- arch/m68k/include/asm/uart.h Uart structure and definition
-- arch/m68k/include/asm/u-boot.h u-boot structure
-
-- include/configs/M54418TWR.h Board specific configuration file
-
-- arch/m68k/lib/board.c board init function
-- arch/m68k/lib/cache.c
-- arch/m68k/lib/interrupts.c Coldfire common interrupt functions
-- arch/m68k/lib/time.c Timer functions (Dma timer and PIT)
-- arch/m68k/lib/traps.c Exception init code
-
-1 MCF5441x specific Options/Settings
-====================================
-1.1 pre-loader is no longer suppoer in thie coldfire family
-
-1.2 Configuration settings for M54418TWR Development Board
-CONFIG_MCF5441x -- define for all MCF5441x CPUs
-CONFIG_M54418 -- define for all Freescale MCF54418 CPUs
-
-CONFIG_MCFUART -- define to use common CF Uart driver
-CONFIG_SYS_UART_PORT -- define UART port number, start with 0, 1 and 2
-CONFIG_BAUDRATE -- define UART baudrate
-
-CONFIG_MCFFEC -- define to use common CF FEC driver
-CONFIG_MII -- enable to use MII driver
-CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery
-CONFIG_SYS_RX_ETH_BUFFER -- Set FEC Receive buffer
-CONFIG_SYS_FAULT_ECHO_LINK_DOWN --
-CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration
-CONFIG_SYS_FEC1_PINMUX -- Set FEC1 Pin configuration
-CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
-CONFIG_SYS_FEC1_MIIBASE -- Set FEC0 MII base register
-MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CONFIG_HAS_ETH1 -- define to enable second FEC in u-boot
-
-CONFIG_MCFTMR -- define to use DMA timer
-
-CONFIG_SYS_IMMR -- define for MBAR offset
-
-CONFIG_EXTRA_CLOCK -- Enable extra clock such as vco, flexbus, pci, etc
-
-CONFIG_SYS_MBAR -- define MBAR offset
-
-CONFIG_MONITOR_IS_IN_RAM -- Not support
-
-CONFIG_SYS_INIT_RAM_ADDR -- defines the base address of the MCF54455 internal SRAM
-
-CONFIG_SYS_CSn_BASE -- defines the Chip Select Base register
-CONFIG_SYS_CSn_MASK -- defines the Chip Select Mask register
-CONFIG_SYS_CSn_CTRL -- defines the Chip Select Control register
-
-CONFIG_SYS_SDRAM_BASE -- defines the DRAM Base
-
-2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
-===========================================
-2.1. System memory map:
- MRAM: 0x00000000-0x0003FFFF (256KB)
- DDR: 0x40000000-0x47FFFFFF (128MB)
- SRAM: 0x80000000-0x8000FFFF (64KB)
- IP: 0xE0000000-0xFFFFFFFF (512MB)
-
-3. COMPILATION
-==============
-3.1 To create U-Boot the gcc-4.x compiler set (ColdFire ELF version)
-from codesourcery.com was used. Download it from:
-http://www.codesourcery.com/gnu_toolchains/coldfire/download.html
-
-3.2 Compilation
- export CROSS_COMPILE=cross-compile-prefix
- cd u-boot
- make distclean
- make M54418TWR_config, or - default to spi serial flash boot, 50Mhz input clock
- make M54418TWR_nand_mii_config, or - default to nand flash boot, mii mode, 25Mhz input clock
- make M54418TWR_nand_rmii_config, or - default to nand flash boot, rmii mode, 50Mhz input clock
- make M54418TWR_nand_rmii_lowfreq_config, or - default to nand flash boot, rmii mode, 50Mhz input clock
- make M54418TWR_serial_mii_config, or - default to spi serial flash boot, 25Mhz input clock
- make M54418TWR_serial_rmii_config, or - default to spi serial flash boot, 50Mhz input clock
- make
-
-4. SCREEN DUMP
-==============
-4.1 M54418TWR Development board
- Boot from NAND flash (NOTE: May not show exactly the same)
-
-U-Boot 2012.10-00209-g12ae1d8-dirty (Oct 18 2012 - 15:54:54)
-
-CPU: Freescale MCF54418 (Mask:a3 Version:1)
- CPU CLK 250 MHz BUS CLK 125 MHz FLB CLK 125 MHz
- INP CLK 50 MHz VCO CLK 500 MHz
-Board: Freescale MCF54418 Tower System
-SPI: ready
-DRAM: 128 MiB
-NAND: 256 MiB
-In: serial
-Out: serial
-Err: serial
-Net: FEC0, FEC1
--> pri
-baudrate=115200
-bootargs=root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(k
-ernel)ro,-(jffs2) console=ttyS0,115200
-bootdelay=2
-eth1addr=00:e0:0c:bc:e5:61
-ethact=FEC0
-ethaddr=00:e0:0c:bc:e5:60
-fileaddr=40010000
-filesize=27354
-gatewayip=192.168.1.1
-hostname=M54418TWR
-inpclk=50000000
-ipaddr=192.168.1.2
-load=tftp ${loadaddr} ${u-boot};
-loadaddr=0x40010000
-mem=129024k
-netdev=eth0
-netmask=255.255.255.0
-prog=nand device 0;nand erase 0 40000;nb_update ${loadaddr} ${filesize};save
-serverip=192.168.1.1
-stderr=serial
-stdin=serial
-stdout=serial
-u-boot=u-boot.bin
-upd=run load; run prog
-
-Environment size: 653/131068 bytes
--> bdinfo
-memstart = 0x40000000
-memsize = 0x08000000
-flashstart = 0x00000000
-flashsize = 0x00000000
-flashoffset = 0x00000000
-sramstart = 0x80000000
-sramsize = 0x00010000
-mbar = 0xFC000000
-cpufreq = 250 MHz
-busfreq = 125 MHz
-flbfreq = 125 MHz
-inpfreq = 50 MHz
-vcofreq = 500 MHz
-ethaddr = 00:e0:0c:bc:e5:60
-eth1addr = 00:e0:0c:bc:e5:61
-ip_addr = 192.168.1.2
-baudrate = 115200 bps
--> help
-? - alias for 'help'
-base - print or set address offset
-bdinfo - print Board Info structure
-boot - boot default, i.e., run 'bootcmd'
-bootd - boot default, i.e., run 'bootcmd'
-bootelf - Boot from an ELF image in memory
-bootm - boot application image from memory
-bootp - boot image via network using BOOTP/TFTP protocol
-bootvx - Boot vxWorks from an ELF image
-cmp - memory compare
-coninfo - print console devices and information
-cp - memory copy
-crc32 - checksum calculation
-dcache - enable or disable data cache
-dhcp - boot image via network using DHCP/TFTP protocol
-echo - echo args to console
-editenv - edit environment variable
-env - environment handling commands
-exit - exit script
-false - do nothing, unsuccessfully
-go - start application at address 'addr'
-help - print command description/usage
-icache - enable or disable instruction cache
-iminfo - print header information for application image
-imxtract- extract a part of a multi-image
-itest - return true/false on integer compare
-loop - infinite loop on address range
-md - memory display
-mdio - MDIO utility commands
-mii - MII utility commands
-mm - memory modify (auto-incrementing address)
-mtest - simple RAM read/write test
-mw - memory write (fill)
-nand - NAND sub-system
-nb_update- Nand boot update program
-nboot - boot from NAND device
-nfs - boot image via network using NFS protocol
-nm - memory modify (constant address)
-ping - send ICMP ECHO_REQUEST to network host
-printenv- print environment variables
-reginfo - print register information
-reset - Perform RESET of the CPU
-run - run commands in an environment variable
-saveenv - save environment variables to persistent storage
-setenv - set environment variables
-sf - SPI flash sub-system
-showvar - print local hushshell variables
-sleep - delay execution for some time
-source - run script from memory
-sspi - SPI utility command
-test - minimal test like /bin/sh
-tftpboot- boot image via network using TFTP protocol
-true - do nothing, successfully
-version - print monitor, compiler and linker version
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the Freescale MCF54418 TWR board.
- *
- * Copyright 2010-2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef _M54418TWR_H
-#define _M54418TWR_H
-
-#include <linux/stringify.h>
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MCFUART
-#define CONFIG_SYS_UART_PORT (0)
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
-
-#define LDS_BOARD_TEXT board/freescale/m54418twr/sbf_dram_init.o (.text*)
-
-#undef CONFIG_WATCHDOG
-
-#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-/*
- * NAND FLASH
- */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_JFFS2_NAND
-#define CONFIG_NAND_FSL_NFC
-#define CONFIG_SYS_NAND_BASE 0xFC0FC000
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
-#define CONFIG_SYS_NAND_SELECT_DEVICE
-#endif
-
-/* Network configuration */
-#ifdef CONFIG_MCFFEC
-#define CONFIG_MII_INIT 1
-#define CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_SYS_RX_ETH_BUFFER 2
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#define CONFIG_SYS_TX_ETH_BUFFER 2
-#define CONFIG_HAS_ETH1
-
-#define CONFIG_ETHPRIME "FEC0"
-#define CONFIG_IPADDR 192.168.1.2
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-
-#define CONFIG_SYS_FEC_BUF_USE_SRAM
-/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
-#ifndef CONFIG_SYS_DISCOVER_PHY
-#define FECDUPLEX FULL
-#define FECSPEED _100BASET
-#define LINKSTATUS 1
-#else
-#define LINKSTATUS 0
-#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#endif
-#endif /* CONFIG_SYS_DISCOVER_PHY */
-#endif
-
-#define CONFIG_HOSTNAME "M54418TWR"
-
-#if defined(CONFIG_CF_SBF)
-/* ST Micro serial flash */
-#define CONFIG_SYS_LOAD_ADDR2 0x40010007
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
- "loadaddr=0x40010000\0" \
- "sbfhdr=sbfhdr.bin\0" \
- "uboot=u-boot.bin\0" \
- "load=tftp ${loadaddr} ${sbfhdr};" \
- "tftp " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${uboot} \0" \
- "upd=run load; run prog\0" \
- "prog=sf probe 0:1 1000000 3;" \
- "sf erase 0 40000;" \
- "sf write ${loadaddr} 0 40000;" \
- "save\0" \
- ""
-#elif defined(CONFIG_SYS_NAND_BOOT)
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
- "loadaddr=0x40010000\0" \
- "u-boot=u-boot.bin\0" \
- "load=tftp ${loadaddr} ${u-boot};\0" \
- "upd=run load; run prog\0" \
- "prog=nand device 0;" \
- "nand erase 0 40000;" \
- "nb_update ${loadaddr} ${filesize};" \
- "save\0" \
- ""
-#else
-#define CONFIG_SYS_UBOOT_END 0x3FFFF
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
- "loadaddr=40010000\0" \
- "u-boot=u-boot.bin\0" \
- "load=tftp ${loadaddr) ${u-boot}\0" \
- "upd=run load; run prog\0" \
- "prog=prot off mram" " ;" \
- "cp.b ${loadaddr} 0 ${filesize};" \
- "save\0" \
- ""
-#endif
-
-/* Realtime clock */
-#undef CONFIG_MCFRTC
-#define CONFIG_RTC_MCFRRTC
-#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
-
-/* Timer */
-#define CONFIG_MCFTMR
-
-/* I2c */
-#undef CONFIG_SYS_FSL_I2C
-#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-/* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SPEED 80000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_OFFSET 0x58000
-#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
-
-/* DSPI and Serial Flash */
-#define CONFIG_CF_DSPI
-#define CONFIG_SERIAL_FLASH
-#define CONFIG_SYS_SBFHDR_SIZE 0x7
-
-/* Input, PCI, Flexbus, and VCO */
-#define CONFIG_EXTRA_CLOCK
-
-#define CONFIG_PRAM 2048 /* 2048 KB */
-
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
-
-#define CONFIG_SYS_MBAR 0xFC000000
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
-/* End of used area in internal SRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
-#define CONFIG_SYS_INIT_RAM_CTRL 0x221
-#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE) - 32)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
-
-#define CONFIG_SYS_DRAM_TEST
-
-#if defined(CONFIG_CF_SBF) || defined(CONFIG_SYS_NAND_BOOT)
-#define CONFIG_SERIAL_BOOT
-#endif
-
-#if defined(CONFIG_SERIAL_BOOT)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
-#else
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
-#endif
-
-#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
-/* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-/* Reserve 256 kB for malloc() */
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization ??
- */
-/* Initial Memory map for Linux */
-#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
- (CONFIG_SYS_SDRAM_SIZE << 20))
-
-/* Configuration for environment
- * Environment is embedded in u-boot in the second sector of the flash
- */
-
-/* FLASH organization */
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
-
-#ifdef CONFIG_SYS_FLASH_CFI
-
-/* Max size that the board might have */
-#define CONFIG_SYS_FLASH_SIZE 0x1000000
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT 270
-/* "Real" (hardware) sectors protection */
-#define CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
-#else
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT 270
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS 0
-#endif
-
-/*
- * This is setting for JFFS2 support in u-boot.
- * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
- */
-#ifdef CONFIG_CMD_JFFS2
-#define CONFIG_JFFS2_DEV "nand0"
-#define CONFIG_JFFS2_PART_OFFSET (0x800000)
-
-#endif
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
-#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
-#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
- CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
- CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
- CF_CACR_ICINVA | CF_CACR_EUSP)
-#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
- CF_CACR_DEC | CF_CACR_DDCM_P | \
- CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
-
-#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 12)
-
-/*-----------------------------------------------------------------------
- * Memory bank definitions
- */
-/*
- * CS0 - NOR Flash 16MB
- * CS1 - Available
- * CS2 - Available
- * CS3 - Available
- * CS4 - Available
- * CS5 - Available
- */
-
- /* Flash */
-#define CONFIG_SYS_CS0_BASE 0x00000000
-#define CONFIG_SYS_CS0_MASK 0x000F0101
-#define CONFIG_SYS_CS0_CTRL 0x00001D60
-
-#endif /* _M54418TWR_H */
projects / u-boot.git / commitdiff
