phy: add driver for Intel XWAY PHY

Add a driver for the Intel XWAY GbE PHY:
 - configure RGMII using dt phy-mode and standard delay properties
 - use genphy_config

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 52ce08b3b3841944d809d41f85bc908404f34caf..86e698190f813c050eda9e39d9099570682a6f0f 100644 (file)
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -321,6 +321,11 @@ config PHY_XILINX_GMII2RGMII
          as bridge between MAC connected over GMII and external phy that
          is connected over RGMII interface.
 
+config PHY_XWAY
+       bool "Intel XWAY PHY support"
+       help
+         This adds support for the Intel XWAY (formerly Lantiq) Gbe PHYs.
+
 config PHY_ETHERNET_ID
        bool "Read ethernet PHY id"
        depends on DM_GPIO

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 9d87eb212c7cf455109000a21f15874fc9a97081..d38e99e717162690327334904b7dc477a6c87349 100644 (file)
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_PHY_TI_DP83867) += dp83867.o
 obj-$(CONFIG_PHY_TI_DP83869) += dp83869.o
 obj-$(CONFIG_PHY_XILINX) += xilinx_phy.o
 obj-$(CONFIG_PHY_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o
+obj-$(CONFIG_PHY_XWAY) += intel_xway.o
 obj-$(CONFIG_PHY_ETHERNET_ID) += ethernet_id.o
 obj-$(CONFIG_PHY_VITESSE) += vitesse.o
 obj-$(CONFIG_PHY_MSCC) += mscc.o

diff --git a/drivers/net/phy/intel_xway.c b/drivers/net/phy/intel_xway.c
new file mode 100644 (file)
index 0000000..dfce3f8
--- /dev/null
+++ b/drivers/net/phy/intel_xway.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <common.h>
+#include <phy.h>
+#include <linux/bitfield.h>
+
+#define XWAY_MDIO_MIICTRL              0x17    /* mii control */
+
+#define XWAY_MDIO_MIICTRL_RXSKEW_MASK  GENMASK(14, 12)
+#define XWAY_MDIO_MIICTRL_TXSKEW_MASK  GENMASK(10, 8)
+
+static int xway_config(struct phy_device *phydev)
+{
+       ofnode node = phy_get_ofnode(phydev);
+       u32 val = 0;
+
+       if (ofnode_valid(node)) {
+               u32 rx_delay, tx_delay;
+
+               rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000);
+               tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000);
+               val |= FIELD_PREP(XWAY_MDIO_MIICTRL_TXSKEW_MASK, rx_delay / 500);
+               val |= FIELD_PREP(XWAY_MDIO_MIICTRL_RXSKEW_MASK, tx_delay / 500);
+               phy_modify(phydev, MDIO_DEVAD_NONE, XWAY_MDIO_MIICTRL,
+                          XWAY_MDIO_MIICTRL_TXSKEW_MASK |
+                          XWAY_MDIO_MIICTRL_RXSKEW_MASK, val);
+       }
+
+       genphy_config_aneg(phydev);
+
+       return 0;
+}
+
+static struct phy_driver XWAY_driver = {
+       .name = "XWAY",
+       .uid = 0xD565A400,
+       .mask = 0xffffff00,
+       .features = PHY_GBIT_FEATURES,
+       .config = xway_config,
+       .startup = genphy_startup,
+       .shutdown = genphy_shutdown,
+};
+
+int phy_xway_init(void)
+{
+       phy_register(&XWAY_driver);
+
+       return 0;
+}

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 90876630533e61acf7f2ee7bac75d23e88cbf511..92143cf23691c478d5ed312eccb199e142371acd 100644 (file)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -556,6 +556,9 @@ int phy_init(void)
 #ifdef CONFIG_PHY_XILINX
        phy_xilinx_init();
 #endif
+#ifdef CONFIG_PHY_XWAY
+       phy_xway_init();
+#endif
 #ifdef CONFIG_PHY_MSCC
        phy_mscc_init();
 #endif

diff --git a/include/phy.h b/include/phy.h
index 0737c4e8f9ae406b068f0bc6788e7031007a9e42..ff69536fca759273961d27471f1b6a21f226a628 100644 (file)
--- a/include/phy.h
+++ b/include/phy.h
@@ -380,6 +380,7 @@ int phy_teranetics_init(void);
 int phy_ti_init(void);
 int phy_vitesse_init(void);
 int phy_xilinx_init(void);
+int phy_xway_init(void);
 int phy_mscc_init(void);
 int phy_fixed_init(void);
 int phy_ncsi_init(void);