]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: socfpga: Enable tiny printf and simple malloc in SPL
authorMarek Vasut <marex@denx.de>
Mon, 30 May 2016 15:09:48 +0000 (17:09 +0200)
committerMarek Vasut <marex@denx.de>
Wed, 1 Jun 2016 20:44:14 +0000 (22:44 +0200)
Enable both features to reduce the SPL size by 6 kiB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_de0_nano_soc_defconfig
configs/socfpga_mcvevk_defconfig
configs/socfpga_sockit_defconfig
configs/socfpga_socrates_defconfig
configs/socfpga_sr1500_defconfig
configs/socfpga_vining_fpga_defconfig
include/configs/socfpga_common.h

index a662e72cc7a835f771c47cc37c1da548bea88159..ec40ec72dca2e3a9e9dd40c2b6d726fee0ca7fd4 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
index b2933f778a0bd0c043ecf643c5b35c4c8e09722f..8e5c527ac2f7ecbc1193689b50a4ad44c692a60c 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
index f197b6d2b008b2a6e2efba418fe0da5d03adf7f9..034a215361005fbe233b32973d563362dcb293b5 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
index 6624f9e07d0badea706f1396ca6aa67d4c8b762f..133a6eba2afe3c0d40f7acaf3a24b3345a47a50d 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
index c6414f8be5397af92922b29806d3dcbe74ff8e1d..8b1bcfcee617105fd31147d459b94858d9938e01 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
index b47a5602b80a04873996ec3ed42746162ec3ebfd..56284a1c0a7d3eb0e4f939e62e127ba11fb5b3cd 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
index aab4498973666da8c79e224c4e863a68c16b516c..d66f7c605ed7f2fa139797c19c2496eecca9a3ff 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SR1500=y
index f8bb9a640bcce0576054db7b5fec21484fe4ed19..6ce4defca43a81adb66db8c0dc582621fb949091 100644 (file)
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
index f6577668a1dd6f31fc94fe794d2914604c13b12f..aee4012c3061797c7f345f9f3012aa6459d9ff11 100644 (file)
@@ -324,9 +324,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_SPL_RAM_DEVICE
 #define CONFIG_SPL_TEXT_BASE           CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE            (64 * 1024)
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MALLOC_SIMPLE
-#endif
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT