]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mmc: fsl_esdhc: fix voltage validation
authorYangbo Lu <yangbo.lu@nxp.com>
Thu, 31 Oct 2019 10:54:21 +0000 (18:54 +0800)
committerPeng Fan <peng.fan@nxp.com>
Tue, 5 Nov 2019 03:21:24 +0000 (11:21 +0800)
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
drivers/mmc/fsl_esdhc.c
include/fsl_esdhc.h

index 7d7236cbfed03a94dd677ae6584a9c4c168bfae8..40fd6afc08c115334cc7dcf6c8058610999f3ce8 100644 (file)
@@ -684,7 +684,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
 {
        struct mmc_config *cfg;
        struct fsl_esdhc *regs;
-       u32 caps, voltage_caps;
+       u32 caps;
 
        if (!priv)
                return -EINVAL;
@@ -696,40 +696,24 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
        memset(cfg, '\0', sizeof(*cfg));
 #endif
 
-       voltage_caps = 0;
        caps = esdhc_read32(&regs->hostcapblt);
-
 #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
-       caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
-                       ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
+       caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 | HOSTCAPBLT_VS30);
 #endif
-
-/* T4240 host controller capabilities register should have VS33 bit */
 #ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-       caps = caps | ESDHC_HOSTCAPBLT_VS33;
+       caps |= HOSTCAPBLT_VS33;
 #endif
-
-       if (caps & ESDHC_HOSTCAPBLT_VS18)
-               voltage_caps |= MMC_VDD_165_195;
-       if (caps & ESDHC_HOSTCAPBLT_VS30)
-               voltage_caps |= MMC_VDD_29_30 | MMC_VDD_30_31;
-       if (caps & ESDHC_HOSTCAPBLT_VS33)
-               voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34;
+       if (caps & HOSTCAPBLT_VS18)
+               cfg->voltages |= MMC_VDD_165_195;
+       if (caps & HOSTCAPBLT_VS30)
+               cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
+       if (caps & HOSTCAPBLT_VS33)
+               cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
 
        cfg->name = "FSL_SDHC";
 #if !CONFIG_IS_ENABLED(DM_MMC)
        cfg->ops = &esdhc_ops;
 #endif
-#ifdef CONFIG_SYS_SD_VOLTAGE
-       cfg->voltages = CONFIG_SYS_SD_VOLTAGE;
-#else
-       cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
-#endif
-       if ((cfg->voltages & voltage_caps) == 0) {
-               printf("voltage not supported by controller\n");
-               return -1;
-       }
-
        if (priv->bus_width == 8)
                cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
        else if (priv->bus_width == 4)
@@ -744,7 +728,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
                        cfg->host_caps &= ~MMC_MODE_4BIT;
        }
 
-       if (caps & ESDHC_HOSTCAPBLT_HSS)
+       if (caps & HOSTCAPBLT_HSS)
                cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
 #ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
index 33dcbee53bea9e3cccc587c0a36e35c5efd4cc50..a015df1cec85c6aec2b45072cbb2ee1ac77e7255 100644 (file)
 #define BLKATTR_SIZE(x)        (x & 0x1fff)
 #define MAX_BLK_CNT    0x7fff  /* so malloc will have enough room with 32M */
 
-#define ESDHC_HOSTCAPBLT_VS18  0x04000000
-#define ESDHC_HOSTCAPBLT_VS30  0x02000000
-#define ESDHC_HOSTCAPBLT_VS33  0x01000000
-#define ESDHC_HOSTCAPBLT_SRS   0x00800000
-#define ESDHC_HOSTCAPBLT_DMAS  0x00400000
-#define ESDHC_HOSTCAPBLT_HSS   0x00200000
+/* Host controller capabilities register */
+#define HOSTCAPBLT_VS18                0x04000000
+#define HOSTCAPBLT_VS30                0x02000000
+#define HOSTCAPBLT_VS33                0x01000000
+#define HOSTCAPBLT_SRS         0x00800000
+#define HOSTCAPBLT_DMAS                0x00400000
+#define HOSTCAPBLT_HSS         0x00200000
 
 struct fsl_esdhc_cfg {
        phys_addr_t esdhc_base;