priv->rx_siz = (PKTSIZE_ALIGN - priv->rx_off);
val = 0;
- if (priv->phy_mode != PHY_INTERFACE_MODE_RGMII)
+ if (priv->phy_mode != PHY_INTERFACE_MODE_RGMII &&
+ priv->phy_mode != PHY_INTERFACE_MODE_RGMII_ID &&
+ priv->phy_mode != PHY_INTERFACE_MODE_RGMII_RXID &&
+ priv->phy_mode != PHY_INTERFACE_MODE_RGMII_TXID)
val |= AVE_CFGR_MII;
writel(val, priv->iobase + AVE_CFGR);
break;
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
break;
default:
return -EINVAL;
val = SG_ETPINMODE_RMII(0);
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
break;
default:
return -EINVAL;
val = SG_ETPINMODE_RMII(priv->regmap_arg);
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
break;
default:
return -EINVAL;