ddr: altera: Compile ALTERA SDRAM in SPL only

Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

diff --git a/Makefile b/Makefile
index d6a6ef19ab8fd38bad3be6fc1a076d85c1387948..5ae5db591ffe6f2067a4f3136d65e64c43eca865 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -713,7 +713,7 @@ libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
 libs-$(CONFIG_SYS_FSL_MMDC) += drivers/ddr/fsl/
-libs-$(CONFIG_ALTERA_SDRAM) += drivers/ddr/altera/
+libs-$(CONFIG_$(SPL_)ALTERA_SDRAM) += drivers/ddr/altera/
 libs-y += drivers/serial/
 libs-y += drivers/usb/dwc3/
 libs-y += drivers/usb/common/

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 8f7b79f58681c8a92a978af0f33802c18d0e5d36..ea316d09d7b4d33a4d9433ebc8ca9069e2afc6ea 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -26,7 +26,7 @@ config TARGET_SOCFPGA_ARRIA5
 
 config TARGET_SOCFPGA_ARRIA10
        bool
-       select ALTERA_SDRAM
+       select SPL_ALTERA_SDRAM
        select SPL_BOARD_INIT if SPL
        select CLK
        select SPL_CLK if SPL
@@ -47,7 +47,7 @@ config TARGET_SOCFPGA_CYCLONE5
 
 config TARGET_SOCFPGA_GEN5
        bool
-       select ALTERA_SDRAM
+       select SPL_ALTERA_SDRAM
        imply FPGA_SOCFPGA
        imply SPL_STACK_R
        imply SPL_SYS_MALLOC_SIMPLE

diff --git a/drivers/Makefile b/drivers/Makefile
index a7bba3ed564b0dfc4035be3254a81abd1612a9f0..e501ae8d04df6364d671ca5b7bc67ddbd648aedf 100644 (file)
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -34,7 +34,7 @@ obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
 obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
 obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
 obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
-obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
+obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
 obj-$(CONFIG_ARCH_IMX8M) += ddr/imx/imx8m/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/

diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
index 8f60b56eb84886f534e663373ffff2e392612e1d..83c1ab5e079ffbb5bb43cf9cf55677a63804c2c2 100644 (file)
--- a/drivers/ddr/altera/Kconfig
+++ b/drivers/ddr/altera/Kconfig
@@ -1,5 +1,6 @@
-config ALTERA_SDRAM
-       bool "SoCFPGA DDR SDRAM driver"
+config SPL_ALTERA_SDRAM
+       bool "SoCFPGA DDR SDRAM driver in SPL"
+       depends on SPL
        depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
        select RAM if TARGET_SOCFPGA_GEN5
        select SPL_RAM if TARGET_SOCFPGA_GEN5

diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile
index 3615b617ecc3bc339a16664151523bc861e61494..341ac0d73b84c087d433be780d87338b0bbe8e7d 100644 (file)
--- a/drivers/ddr/altera/Makefile
+++ b/drivers/ddr/altera/Makefile
@@ -6,7 +6,7 @@
 # (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw>
 # Copyright (C) 2014 Altera Corporation <www.altera.com>
 
-ifdef CONFIG_ALTERA_SDRAM
+ifdef CONFIG_$(SPL_)ALTERA_SDRAM
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o
 obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_s10.o

diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h
index 12e77c0a9050f6a3e1d561a5d9efde061f442505..b8a86f2cb20b8be2eeabed5cf76c92a3fb259021 100644 (file)
--- a/include/configs/socfpga_stratix10_socdk.h
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -132,7 +132,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 /*
  * SDRAM controller
  */
-#define CONFIG_ALTERA_SDRAM
+#define CONFIG_SPL_ALTERA_SDRAM
 
 /*
  * Serial / UART configurations

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index bc86b848a217f6f6c1c307b77cddb89f81be0f05..46105538151de182db91dd4c4a81beef9f1e6fa5 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1824,6 +1824,7 @@ CONFIG_SPLASH_SCREEN_ALIGN
 CONFIG_SPLASH_SOURCE
 CONFIG_SPLL_FREQ
 CONFIG_SPL_
+CONFIG_SPL_ALTERA_SDRAM
 CONFIG_SPL_ATMEL_SIZE
 CONFIG_SPL_BOARD_LOAD_IMAGE
 CONFIG_SPL_BOOTROM_SAVE