imx_watchdog: always set minimal timeout in reset_cpu

The problem is that timeout bits in WCR register were leaved unchanged.
So previously set timeout value was applied and therefore 'reset'
command takes any value up to two minutes, depending on previous
watchdog settings, instead of minimal 0.5 seconds.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>

diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 0d775956bff45fd52687676f16fc706788c2f6ff..f9f817596ff2f97af29e4d6e2415c2cefef3f13a 100644 (file)
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -43,7 +43,7 @@ void reset_cpu(ulong addr)
 {
        struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
 
-       clrsetbits_le16(&wdog->wcr, 0, WCR_WDE);
+       clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);
 
        writew(0x5555, &wdog->wsr);
        writew(0xaaaa, &wdog->wsr);     /* load minimum 1/2 second timeout */

diff --git a/include/fsl_wdog.h b/include/fsl_wdog.h
index d15a70cedbaffd4c8f37d62e12fefaed422646de..f698d4d64edc9b6cd544d800e18f8fcd7d350f3a 100644 (file)
--- a/include/fsl_wdog.h
+++ b/include/fsl_wdog.h
@@ -16,3 +16,4 @@ struct watchdog_regs {
 #define WCR_WDT                0x08
 #define WCR_SRS                0x10
 #define SET_WCR_WT(x)  (x << 8)
+#define WCR_WT_MSK     SET_WCR_WT(0xFF)