mtd: spi-nor-core: Perform a Soft Reset on shutdown

On probe, the SPI NOR core will put a flash in 8D-8D-8D mode if it
supports it. But Linux as of now expects to get the flash in 1S-1S-1S
mode. Handing the flash to Linux in Octal DTR mode means the kernel will
fail to detect the flash.

So, we need to reset to Power-on-Reset (POR) state before handing off
the flash. A Software Reset command can be used to do this.

One limitation of the soft reset is that it will restore state from
non-volatile registers in some flashes. This means that if the flash was
set to 8D mode in a non-volatile configuration, a soft reset won't help.
This commit assumes that we don't set any non-volatile bits anywhere,
and the flash doesn't have any non-volatile Octal DTR mode
configuration.

Since spi-nor-tiny doesn't (and likely shouldn't) have
spi_nor_soft_reset(), add a dummy spi_nor_remove() for it that does
nothing.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index a701167dccf9f4c86a790d0dcd7def6741b3cb3b..185ebbeb022a347ee40058739ab396ff7ee4ab63 100644 (file)
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -97,6 +97,13 @@ config SPI_FLASH_SMART_HWCAPS
         can support a type of operation in a much more refined way compared
         to using flags like SPI_RX_DUAL, SPI_TX_QUAD, etc.
 
+config SPI_FLASH_SOFT_RESET
+       bool "Software Reset support for SPI NOR flashes"
+       default n
+       help
+        Enable support for xSPI Software Reset. It will be used to switch from
+        Octal DTR mode to legacy mode on shutdown and boot (if enabled).
+
 config SPI_FLASH_BAR
        bool "SPI flash Bank/Extended address register support"
        help

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 7edb8759fdcb1af9aaac53e15cd94b3741e79b84..f461082e03de22b4b26d29a2ad25f854c8541261 100644 (file)
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -151,6 +151,11 @@ int spi_flash_std_probe(struct udevice *dev)
 static int spi_flash_std_remove(struct udevice *dev)
 {
        struct spi_flash *flash = dev_get_uclass_priv(dev);
+       int ret;
+
+       ret = spi_nor_remove(flash);
+       if (ret)
+               return ret;
 
        if (CONFIG_IS_ENABLED(SPI_FLASH_MTD))
                spi_flash_mtd_unregister(flash);
@@ -178,6 +183,7 @@ U_BOOT_DRIVER(jedec_spi_nor) = {
        .remove         = spi_flash_std_remove,
        .priv_auto      = sizeof(struct spi_nor),
        .ops            = &spi_flash_std_ops,
+       .flags          = DM_FLAG_OS_PREPARE,
 };
 
 DM_DRIVER_ALIAS(jedec_spi_nor, spansion_m25p16)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 0d38ffc4f335ced92243bb7602c4dd6a41938fb5..642068a4e265ee1e453c802e4875c42a73abfaf5 100644 (file)
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -22,6 +22,7 @@
 #include <linux/math64.h>
 #include <linux/sizes.h>
 #include <linux/bitfield.h>
+#include <linux/delay.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/spi-nor.h>
@@ -200,6 +201,8 @@ struct spi_nor_fixups {
                          struct spi_nor_flash_parameter *params);
 };
 
+#define SPI_NOR_SRST_SLEEP_LEN                 200
+
 /**
  * spi_nor_get_cmd_ext() - Get the command opcode extension based on the
  *                        extension type.
@@ -2971,6 +2974,71 @@ static int spi_nor_init(struct spi_nor *nor)
        return 0;
 }
 
+#ifdef CONFIG_SPI_FLASH_SOFT_RESET
+/**
+ * spi_nor_soft_reset() - perform the JEDEC Software Reset sequence
+ * @nor:       the spi_nor structure
+ *
+ * This function can be used to switch from Octal DTR mode to legacy mode on a
+ * flash that supports it. The soft reset is executed in Octal DTR mode.
+ *
+ * Return: 0 for success, -errno for failure.
+ */
+static int spi_nor_soft_reset(struct spi_nor *nor)
+{
+       struct spi_mem_op op;
+       int ret;
+       enum spi_nor_cmd_ext ext;
+
+       ext = nor->cmd_ext_type;
+       nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
+
+       op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0),
+                       SPI_MEM_OP_NO_DUMMY,
+                       SPI_MEM_OP_NO_ADDR,
+                       SPI_MEM_OP_NO_DATA);
+       spi_nor_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
+       ret = spi_mem_exec_op(nor->spi, &op);
+       if (ret) {
+               dev_warn(nor->dev, "Software reset enable failed: %d\n", ret);
+               goto out;
+       }
+
+       op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0),
+                       SPI_MEM_OP_NO_DUMMY,
+                       SPI_MEM_OP_NO_ADDR,
+                       SPI_MEM_OP_NO_DATA);
+       spi_nor_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
+       ret = spi_mem_exec_op(nor->spi, &op);
+       if (ret) {
+               dev_warn(nor->dev, "Software reset failed: %d\n", ret);
+               goto out;
+       }
+
+       /*
+        * Software Reset is not instant, and the delay varies from flash to
+        * flash. Looking at a few flashes, most range somewhere below 100
+        * microseconds. So, wait for 200ms just to be sure.
+        */
+       udelay(SPI_NOR_SRST_SLEEP_LEN);
+
+out:
+       nor->cmd_ext_type = ext;
+       return ret;
+}
+#endif /* CONFIG_SPI_FLASH_SOFT_RESET */
+
+int spi_nor_remove(struct spi_nor *nor)
+{
+#ifdef CONFIG_SPI_FLASH_SOFT_RESET
+       if (nor->info->flags & SPI_NOR_OCTAL_DTR_READ &&
+           nor->flags & SNOR_F_SOFT_RESET)
+               return spi_nor_soft_reset(nor);
+#endif
+
+       return 0;
+}
+
 void spi_nor_set_fixups(struct spi_nor *nor)
 {
 }

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index b2159f631957e17f96e75b0b34b7fba034802918..29ce1751567e1f96c48d40b6e4e64414dddb4120 100644 (file)
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -67,6 +67,8 @@
 #define SPINOR_OP_CLFSR                0x50    /* Clear flag status register */
 #define SPINOR_OP_RDEAR                0xc8    /* Read Extended Address Register */
 #define SPINOR_OP_WREAR                0xc5    /* Write Extended Address Register */
+#define SPINOR_OP_SRSTEN       0x66    /* Software Reset Enable */
+#define SPINOR_OP_SRST         0x99    /* Software Reset */
 
 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
 #define SPINOR_OP_READ_4B      0x13    /* Read data bytes (low frequency) */
@@ -562,4 +564,19 @@ device_node *spi_nor_get_flash_node(struct spi_nor *nor)
  */
 int spi_nor_scan(struct spi_nor *nor);
 
+#if CONFIG_IS_ENABLED(SPI_FLASH_TINY)
+static inline int spi_nor_remove(struct spi_nor *nor)
+{
+       return 0;
+}
+#else
+/**
+ * spi_nor_remove() - perform cleanup before booting to the next stage
+ * @nor:       the spi_nor structure
+ *
+ * Return: 0 for success, -errno for failure.
+ */
+int spi_nor_remove(struct spi_nor *nor);
+#endif
+
 #endif