CONFIG_SPL
Enable building of SPL globally.
- CONFIG_SPL_RELOC_TEXT_BASE
- Address to relocate to. If unspecified, this is equal to
- CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
-
CONFIG_SPL_BSS_START_ADDR
Link address for the BSS within the SPL binary.
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.
- CONFIG_SPL_RELOC_STACK
- Adress of the start of the stack SPL will use after
- relocation. If unspecified, this is equal to
- CONFIG_SYS_SPL_MALLOC_START
- Starting address of the malloc pool used in SPL.
- When this option is set the full malloc is used in SPL and
- it is set up by spl_init() and before that, the simple malloc()
- can be used if CONFIG_SYS_MALLOC_F is defined.
-
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
*/
- relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
+ relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE);
}
void board_init_r(gd_t *gd, ulong dest_addr)
arch_cpu_init();
get_clocks();
- mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
- CONFIG_SPL_RELOC_MALLOC_SIZE);
+ mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR),
+ CONFIG_VAL(RELOC_MALLOC_SIZE));
gd->flags |= GD_FLG_FULL_MALLOC_INIT;
#ifndef CONFIG_SPL_NAND_BOOT
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
*/
- relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
+ relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE);
}
void board_init_r(gd_t *gd, ulong dest_addr)
arch_cpu_init();
get_clocks();
- mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
- CONFIG_SPL_RELOC_MALLOC_SIZE);
+ mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR),
+ CONFIG_VAL(RELOC_MALLOC_SIZE));
gd->flags |= GD_FLG_FULL_MALLOC_INIT;
#ifdef CONFIG_SPL_ENV_SUPPORT
endmenu
-menu "PowerPC SPL specific options"
- depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK)
+menu "PowerPC SPL / TPL specific options"
+ depends on PPC && (SPL && !SPL_FRAMEWORK)
config SPL_INIT_MINIMAL
bool "Arch init code will be built for a very small image"
config SPL_SKIP_RELOCATE
bool "Skip relocating SPL"
+config SPL_RELOC_TEXT_BASE
+ hex "Address to relocate SPL to"
+ default SPL_TEXT_BASE
+ help
+ If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no
+ relocation is done).
+
+config SPL_RELOC_STACK
+ hex "Address of the start of the stack SPL will use after relocation."
+ help
+ If unspecified, this is equal to CONFIG_SYS_SPL_MALLOC_START. Starting
+ address of the malloc pool used in SPL. When this option is set the full
+ malloc is used in SPL and it is set up by spl_init() and before that, the
+ simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined.
+
+config SPL_RELOC_MALLOC
+ bool "SPL has malloc pool after relocation"
+
+config SPL_RELOC_MALLOC_ADDR
+ hex "Address of malloc pool in SPL"
+ depends on SPL_RELOC_MALLOC
+
+config SPL_RELOC_MALLOC_SIZE
+ hex "Size of malloc pool in SPL"
+ depends on SPL_RELOC_MALLOC
+
+config TPL_RELOC_TEXT_BASE
+ hex "Address to relocate TPL to"
+ depends on TPL
+ default TPL_TEXT_BASE
+ help
+ If unspecified, this is equal to CONFIG_TPL_TEXT_BASE (i.e. no
+ relocation is done).
+
+config TPL_RELOC_STACK
+ hex "Address of the start of the stack TPL will use after relocation."
+ depends on TPL
+ help
+ If unspecified, this is equal to CONFIG_SYS_TPL_MALLOC_START. Starting
+ address of the malloc pool used in TPL. When this option is set the full
+ malloc is used in TPL and it is set up by spl_init() and before that, the
+ simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined.
+
+config TPL_RELOC_MALLOC
+ bool "TPL has malloc pool after relocation"
+ depends on TPL
+
+config TPL_RELOC_MALLOC_ADDR
+ hex "Address of malloc pool in TPL"
+ depends on TPL_RELOC_MALLOC
+
+config TPL_RELOC_MALLOC_SIZE
+ hex "Size of malloc pool in TPL"
+ depends on TPL_RELOC_MALLOC
+
endmenu
config HANDOFF
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
+CONFIG_SPL_RELOC_STACK=0xd003fff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_TPL_RELOC_STACK=0xd0030000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
+CONFIG_SPL_RELOC_STACK=0xd003fff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_TPL_RELOC_STACK=0xd0030000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
+CONFIG_SPL_RELOC_STACK=0xd003fff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_TPL_RELOC_STACK=0xd0030000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
+CONFIG_SPL_RELOC_STACK=0xd003fff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_TPL_RELOC_STACK=0xd0030000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
+CONFIG_SPL_RELOC_STACK=0xd001c000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
+CONFIG_SPL_RELOC_STACK=0xf8fbfff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
+CONFIG_TPL_RELOC_STACK=0xf8fb0000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
+CONFIG_SPL_RELOC_STACK=0xf8fbfff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
+CONFIG_TPL_RELOC_STACK=0xf8fb0000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
+CONFIG_SPL_RELOC_STACK=0xf8fbfff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
+CONFIG_TPL_RELOC_STACK=0xf8fb0000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000
+CONFIG_SPL_RELOC_STACK=0xf8fffff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
+CONFIG_TPL_RELOC_STACK=0xf8fb0000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000
+CONFIG_SPL_RELOC_STACK=0xf8fffff0
+CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
+CONFIG_TPL_RELOC_STACK=0xf8fb0000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_STACK=0xf8f9d000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
-CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
+CONFIG_SPL_RELOC_STACK=0xfffd8000
+CONFIG_SPL_RELOC_MALLOC=y
+CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
+CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
#ifdef CONFIG_NXP_ESBC
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000
-#define CONFIG_SPL_RELOC_STACK 0x00100000
#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
#else
#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x3000)
-#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
#endif
#endif
#endif
#define CONFIG_SYS_L3_SIZE (256 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_L3_SIZE 256 << 10
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_VADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SYS_L3_SIZE (512 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SYS_L3_SIZE (512 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SYS_L3_SIZE (512 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
-#if defined(CONFIG_TARGET_P2020RDB)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
-#else
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
-#endif
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
#else
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000)
-#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
#endif /* CONFIG_TPL_BUILD */
#endif
#endif