ARM: vf610: ddrmc: fix initialization completion detection

The CR80 register has multiple interrupt bits, the code is supposed
to check bit 8 but instead uses a logical and. In most cases this
probably did not affect real operations since at that stage typically
none of the other bits are set.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index b7374bfb8f3299d2b2fdd0b81e334ba512f862a6..f71fbf4e73c4c79750f247badebec0a4f20c7ac5 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -200,7 +200,8 @@
 #define DDRMC_CR78_Q_FULLNESS(v)                       (((v) & 0x7) << 24)
 #define DDRMC_CR78_BUR_ON_FLY_BIT(v)                   ((v) & 0xf)
 #define DDRMC_CR79_CTLUPD_AREF(v)                      (((v) & 0x1) << 24)
-#define DDRMC_CR82_INT_MASK                            0x10000000
+#define DDRMC_CR80_MC_INIT_COMPLETE                    (1 << 8)
+#define DDRMC_CR82_INT_MASK                            (1 << 28)
 #define DDRMC_CR87_ODT_WR_MAPCS0(v)                    ((v) << 24)
 #define DDRMC_CR87_ODT_RD_MAPCS0(v)                    ((v) << 16)
 #define DDRMC_CR88_TODTL_CMD(v)                                (((v) & 0x1f) << 16)

diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
index 7cc8f5d2c0c7114e67e56bbdb3ed47c42ee7ead9..9739738a08b8ccf889a1e975d2205c3d7d5b6da0 100644 (file)
--- a/arch/arm/mach-imx/ddrmc-vf610.c
+++ b/arch/arm/mach-imx/ddrmc-vf610.c
@@ -233,6 +233,7 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings,
        /* all inits done, start the DDR controller */
        writel(DDRMC_CR00_DRAM_CLASS_DDR3 | DDRMC_CR00_START, &ddrmr->cr[0]);
 
-       while (!(readl(&ddrmr->cr[80]) && 0x100))
+       while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE))
                udelay(10);
+       writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]);
 }