x86: config: Enable AHCI support for coreboot

Enable AHCI driver for Intel SATA devices.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 3df085be51146eebd43dba256f8b6177418333e5..cc95e2be987212014e6b6cffc23365f3c23c45cd 100644 (file)
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -45,6 +45,28 @@
 #undef CONFIG_WATCHDOG
 #undef CONFIG_HW_WATCHDOG
 
+/* SATA AHCI storage */
+
+#define CONFIG_SCSI_AHCI
+
+#ifdef CONFIG_SCSI_AHCI
+#define CONFIG_SYS_64BIT_LBA
+#define CONFIG_SATA_INTEL              1
+#define CONFIG_SCSI_DEV_LIST           {PCI_VENDOR_ID_INTEL, \
+                       PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
+       {PCI_VENDOR_ID_INTEL,           \
+                       PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
+       {PCI_VENDOR_ID_INTEL, \
+                       PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
+       {PCI_VENDOR_ID_INTEL,           \
+                       PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
+
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID    2
+#define CONFIG_SYS_SCSI_MAX_LUN                1
+#define CONFIG_SYS_SCSI_MAX_DEVICE     (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+                                        CONFIG_SYS_SCSI_MAX_LUN)
+#endif
+
 /*-----------------------------------------------------------------------
  * Real Time Clock Configuration
  */