igep00x0: add Hynix timings

Tested on IGEPv2 with Micron MT29F4G16ABBDA3W and
Hynix H27S4G6F2DKA-BM

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Javier Martinez Canillas <javier@samsung.com>
Tested-by: Javier Martinez Canillas <javier@samsung.com>

diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 71688cc89b11107744cd627872315e2cf6913a6d..669f3dde7f92a54393abea031c76464f31d35838 100644 (file)
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -84,10 +84,22 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
        int mfr, id, err = identify_nand_chip(&mfr, &id);
 
        timings->mr = MICRON_V_MR_165;
-       if (!err && mfr == NAND_MFR_MICRON) {
-               timings->mcfg = MICRON_V_MCFG_200(256 << 20);
-               timings->ctrla = MICRON_V_ACTIMA_200;
-               timings->ctrlb = MICRON_V_ACTIMB_200;
+       if (!err) {
+               switch (mfr) {
+               case NAND_MFR_HYNIX:
+                       timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
+                       timings->ctrla = HYNIX_V_ACTIMA_200;
+                       timings->ctrlb = HYNIX_V_ACTIMB_200;
+                       break;
+               case NAND_MFR_MICRON:
+                       timings->mcfg = MICRON_V_MCFG_200(256 << 20);
+                       timings->ctrla = MICRON_V_ACTIMA_200;
+                       timings->ctrlb = MICRON_V_ACTIMB_200;
+                       break;
+               default:
+                       /* Should not happen... */
+                       break;
+               }
                timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
                gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
        } else {