x86: acpi: Describe USB 3 host controller found on Intel Tangier

USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
index 6ccdc25136e4ad6f066e87538f19ad7d9021fe78..f088fe3cf51f5b68a6b23db66c92ea695c15f74d 100644 (file)
--- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
@@ -321,6 +321,53 @@ Device (PCI0)
         }
     }
 
+    Device (DWC3)
+    {
+        Name (_ADR, 0x00110000)
+        Name (_DEP, Package ()
+        {
+            ^IPC1.PMIC
+        })
+
+        Method (_STA, 0, NotSerialized)
+        {
+            Return (STA_VISIBLE)
+        }
+
+        Device (RHUB)
+        {
+            Name (_ADR, Zero)
+
+            /* GPLD: Generate Port Location Data (PLD) */
+            Method (GPLD, 1, Serialized) {
+                Name (PCKG, Package () {
+                    Buffer (0x14) {}
+                })
+
+                /* REV: Revision 0x02 for ACPI 5.0 */
+                CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)
+                Store (0x0002, REV)
+
+                /* VISI: Port visibility to user per port */
+                CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)
+                Store (Arg0, VISI)
+
+                /* VOFF: Vertical offset is not supplied */
+                CreateField (DerefOf (Index (PCKG, Zero)), 0x80, 0x10, VOFF)
+                Store (0xFFFF, VOFF)
+
+                /* HOFF: Horizontal offset is not supplied */
+                CreateField (DerefOf (Index (PCKG, Zero)), 0x90, 0x10, HOFF)
+                Store (0xFFFF, HOFF)
+
+                Return (PCKG)
+            }
+
+            Device (HS01) { Name (_ADR, 1) }
+            Device (SS01) { Name (_ADR, 2) }
+        }
+    }
+
     Device (PWM0)
     {
         Name (_ADR, 0x00170000)