]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
timer: Add AST2700 IBEX timer support
authorChia-Wei Wang <chiawei_wang@aspeedtech.com>
Tue, 10 Sep 2024 09:39:17 +0000 (17:39 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 11 Sep 2024 12:35:03 +0000 (20:35 +0800)
Add the driver for the AST2700 Ibex timer, which uses CPU
cycles as the timer count running at 200MHz.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
drivers/timer/Kconfig
drivers/timer/Makefile
drivers/timer/ast_ibex_timer.c [new file with mode: 0644]

index 6b1de82ae38dd78e57ef96a8200f7345275be49c..cb6fc0e7fda87e9b32171cf8fb79cd207fd973fc 100644 (file)
@@ -106,6 +106,12 @@ config AST_TIMER
          This is mostly because they all share several registers which
          makes it difficult to completely separate them.
 
+config AST_IBEX_TIMER
+       bool "Aspeed ast2700 Ibex timer"
+       depends on TIMER
+       help
+         Select this to enable a timer support for the Ibex RV32-based MCUs in AST2700.
+
 config ATCPIT100_TIMER
        bool "ATCPIT100 timer support"
        depends on TIMER
index fb95c8899e396a570e3c14a6f64132e4a33c6787..fec4af392e648cf74c766f6d4eafe0eb803eacc6 100644 (file)
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_)ANDES_PLMT_TIMER) += andes_plmt_timer.o
 obj-$(CONFIG_ARC_TIMER)        += arc_timer.o
 obj-$(CONFIG_ARM_TWD_TIMER)    += arm_twd_timer.o
 obj-$(CONFIG_AST_TIMER)        += ast_timer.o
+obj-$(CONFIG_AST_IBEX_TIMER)   += ast_ibex_timer.o
 obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
 obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
 obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o
diff --git a/drivers/timer/ast_ibex_timer.c b/drivers/timer/ast_ibex_timer.c
new file mode 100644 (file)
index 0000000..2618396
--- /dev/null
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024 Aspeed Technology Inc.
+ */
+
+#include <asm/csr.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <errno.h>
+#include <timer.h>
+
+#define CSR_MCYCLE     0xb00
+#define CSR_MCYCLEH    0xb80
+
+static u64 ast_ibex_timer_get_count(struct udevice *dev)
+{
+       uint32_t cnt_l, cnt_h;
+
+       cnt_l = csr_read(CSR_MCYCLE);
+       cnt_h = csr_read(CSR_MCYCLEH);
+
+       return ((uint64_t)cnt_h << 32) | cnt_l;
+}
+
+static int ast_ibex_timer_probe(struct udevice *dev)
+{
+       return 0;
+}
+
+static const struct timer_ops ast_ibex_timer_ops = {
+       .get_count = ast_ibex_timer_get_count,
+};
+
+static const struct udevice_id ast_ibex_timer_ids[] = {
+       { .compatible = "aspeed,ast2700-ibex-timer" },
+       { }
+};
+
+U_BOOT_DRIVER(ast_ibex_timer) = {
+       .name = "ast_ibex_timer",
+       .id = UCLASS_TIMER,
+       .of_match = ast_ibex_timer_ids,
+       .probe = ast_ibex_timer_probe,
+       .ops = &ast_ibex_timer_ops,
+};