This is mostly because they all share several registers which
makes it difficult to completely separate them.
+config AST_IBEX_TIMER
+ bool "Aspeed ast2700 Ibex timer"
+ depends on TIMER
+ help
+ Select this to enable a timer support for the Ibex RV32-based MCUs in AST2700.
+
config ATCPIT100_TIMER
bool "ATCPIT100 timer support"
depends on TIMER
obj-$(CONFIG_ARC_TIMER) += arc_timer.o
obj-$(CONFIG_ARM_TWD_TIMER) += arm_twd_timer.o
obj-$(CONFIG_AST_TIMER) += ast_timer.o
+obj-$(CONFIG_AST_IBEX_TIMER) += ast_ibex_timer.o
obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024 Aspeed Technology Inc.
+ */
+
+#include <asm/csr.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <errno.h>
+#include <timer.h>
+
+#define CSR_MCYCLE 0xb00
+#define CSR_MCYCLEH 0xb80
+
+static u64 ast_ibex_timer_get_count(struct udevice *dev)
+{
+ uint32_t cnt_l, cnt_h;
+
+ cnt_l = csr_read(CSR_MCYCLE);
+ cnt_h = csr_read(CSR_MCYCLEH);
+
+ return ((uint64_t)cnt_h << 32) | cnt_l;
+}
+
+static int ast_ibex_timer_probe(struct udevice *dev)
+{
+ return 0;
+}
+
+static const struct timer_ops ast_ibex_timer_ops = {
+ .get_count = ast_ibex_timer_get_count,
+};
+
+static const struct udevice_id ast_ibex_timer_ids[] = {
+ { .compatible = "aspeed,ast2700-ibex-timer" },
+ { }
+};
+
+U_BOOT_DRIVER(ast_ibex_timer) = {
+ .name = "ast_ibex_timer",
+ .id = UCLASS_TIMER,
+ .of_match = ast_ibex_timer_ids,
+ .probe = ast_ibex_timer_probe,
+ .ops = &ast_ibex_timer_ops,
+};