arm: dts: chameleonv3: Add 270-2 variant

Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
Mercury+ AA1 module

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9d647b96393a0ac05514bd816c42ceaca51fcc79..7a577deb5023d66aebde64f8e1f485cfa1666699 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -442,6 +442,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=                               \
        socfpga_agilex_socdk.dtb                        \
        socfpga_arria5_secu1.dtb                        \
        socfpga_arria5_socdk.dtb                        \
+       socfpga_arria10_chameleonv3_270_2.dtb           \
        socfpga_arria10_chameleonv3_270_3.dtb           \
        socfpga_arria10_chameleonv3_480_2.dtb           \
        socfpga_arria10_socdk_sdmmc.dtb                 \

diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
new file mode 100644 (file)
index 0000000..05b4485
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10_chameleonv3_480_2_handoff.h"
+#include "socfpga_arria10-handoff.dtsi"
+#include "socfpga_arria10_handoff_u-boot.dtsi"
+#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+       altr,bitstream = "fpga-270-2.itb";
+};

diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
new file mode 100644 (file)
index 0000000..bef0280
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10_chameleonv3.dtsi"