#endif
void do_bridge_reset(int enable, unsigned int mask);
+void force_periph_program(unsigned int status);
bool is_regular_boot_valid(void);
+bool is_periph_program_force(void);
void set_regular_boot(unsigned int status);
void socfpga_pl310_clear(void);
void socfpga_get_managers_addr(void);
#define PINMUX_UART1_TX_SHARED_IO_OFFSET_Q4_3 0x98
#define REGULAR_BOOT_MAGIC 0xd15ea5e
+#define PERIPH_RBF_PROG_FORCE 0x50455249
#define QSPI_S25FL_SOFT_RESET_COMMAND 0x00f0ff82
#define QSPI_N25_SOFT_RESET_COMMAND 0x00000001
socfpga_bridges_reset();
}
+/*
+ * This function set/unset flag with number "0x50455249" to
+ * handoff register isw_handoff[7] - 0xffd0624c
+ * This flag is used to force periph RBF program regardless FPGA status
+ * and double periph RBF config are needed on some devices or boards to
+ * stabilize the IO config system.
+ */
+void force_periph_program(unsigned int status)
+{
+ if (status)
+ writel(PERIPH_RBF_PROG_FORCE, socfpga_get_sysmgr_addr() +
+ SYSMGR_A10_ISW_HANDOFF_BASE + SYSMGR_A10_ISW_HANDOFF_7);
+ else
+ writel(0, socfpga_get_sysmgr_addr() +
+ SYSMGR_A10_ISW_HANDOFF_BASE + SYSMGR_A10_ISW_HANDOFF_7);
+}
+
+/*
+ * This function is used to check whether
+ * handoff register isw_handoff[7] contains
+ * flag for forcing the periph RBF program "0x50455249".
+ */
+bool is_periph_program_force(void)
+{
+ unsigned int status;
+
+ status = readl(socfpga_get_sysmgr_addr() +
+ SYSMGR_A10_ISW_HANDOFF_BASE + SYSMGR_A10_ISW_HANDOFF_7);
+
+ if (status == PERIPH_RBF_PROG_FORCE)
+ return true;
+ else
+ return false;
+}
+
/*
* This function set/unset magic number "0xd15ea5e" to
* handoff register isw_handoff[7] - 0xffd0624c
} else if (!is_fpgamgr_early_user_mode()) {
/* Program IOSSM(early IO release) or full FPGA */
fpgamgr_program(buf, FPGA_BUFSIZ, 0);
+
+ /* Skipping double program for combined RBF */
+ if (!is_fpgamgr_user_mode()) {
+ /*
+ * Expect FPGA entered early user mode, so
+ * the flag is set to re-program IOSSM
+ */
+ force_periph_program(true);
+
+ /* Re-program IOSSM to stabilize IO system */
+ fpgamgr_program(buf, FPGA_BUFSIZ, 0);
+
+ force_periph_program(false);
+ }
}
/* If the IOSSM/full FPGA is already loaded, start DDR */
if (strstr(uname, "fpga-periph") &&
(!is_fpgamgr_early_user_mode() ||
- is_fpgamgr_user_mode())) {
+ is_fpgamgr_user_mode() ||
+ is_periph_program_force())) {
fpga_node_name = uname;
printf("FPGA: Start to program ");
printf("peripheral/full bitstream ...\n");