ARM: uniphier: add weird workaround code for LD20

When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
  BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)

This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot.  The solution I found is to
read sctlr_el1 and write back the value as-is.  This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/arm64/Makefile b/arch/arm/mach-uniphier/arm64/Makefile
index eb34c207ce0b653f00f75308d5a7cf492db55691..06072f23bd8c478e49ef6dfc613775e29b7f57fe 100644 (file)
--- a/arch/arm/mach-uniphier/arm64/Makefile
+++ b/arch/arm/mach-uniphier/arm64/Makefile
@@ -9,5 +9,7 @@ obj-y += mem_map.o
 ifdef CONFIG_ARMV8_MULTIENTRY
 obj-y += smp.o smp_kick_cpus.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD20) += arm-cci500.o
+else
+obj-$(CONFIG_ARCH_UNIPHIER_LD20) += lowlevel_init.o
 endif
 endif

diff --git a/arch/arm/mach-uniphier/arm64/lowlevel_init.S b/arch/arm/mach-uniphier/arm64/lowlevel_init.S
new file mode 100644 (file)
index 0000000..e52db1d
--- /dev/null
+++ b/arch/arm/mach-uniphier/arm64/lowlevel_init.S
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2017 Socionext Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+ENTRY(lowlevel_init)
+       /* LD20 needs the following code to boot.  I do not know why. */
+       mrs     x0, sctlr_el1
+       msr     sctlr_el1, x0
+       ret
+ENDPROC(lowlevel_init)