kirkwood: implement kw_sdram_bs_set()

Some boards might be equipped with different SDRAM configurations.
When that is the case, CPU CS Window Size Register (CS[0]n Size)
should be set to the biggest value through board.cfg file; then its
value can be fixed at runtime according to the detected SDRAM size.

Therefore, implement kw_sdram_bs_set().

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Marek Vasut <marex@denx.de>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
index 1c5faabb4555e6a53a1826d90e706e403052a3ae..5e2f9d80ea1dbdc9b3a9a910e4fc71a9d2dbcfe8 100644 (file)
--- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
@@ -39,6 +39,11 @@ struct kw_sdram_addr_dec {
        struct kw_sdram_bank    sdram_bank[4];
 };
 
+#define KW_REG_CPUCS_WIN_ENABLE                (1 << 0)
+#define KW_REG_CPUCS_WIN_WR_PROTECT    (1 << 1)
+#define KW_REG_CPUCS_WIN_WIN0_CS(x)    (((x) & 0x3) << 2)
+#define KW_REG_CPUCS_WIN_SIZE(x)       (((x) & 0xff) << 24)
+
 /*
  * kw_sdram_bar - reads SDRAM Base Address Register
  */
@@ -56,6 +61,25 @@ u32 kw_sdram_bar(enum memory_bank bank)
        return result;
 }
 
+/*
+ * kw_sdram_bs_set - writes SDRAM Bank size
+ */
+static void kw_sdram_bs_set(enum memory_bank bank, u32 size)
+{
+       struct kw_sdram_addr_dec *base =
+               (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500);
+       /* Read current register value */
+       u32 reg = readl(&base->sdram_bank[bank].win_sz);
+
+       /* Clear window size */
+       reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF);
+
+       /* Set new window size */
+       reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24);
+
+       writel(reg, &base->sdram_bank[bank].win_sz);
+}
+
 /*
  * kw_sdram_bs - reads SDRAM Bank size
  */