power: pfuze100 correct SWBST macro definition

According to datasheet, SWBST_MODE starts from bit 2 and it occupies 2 bits.
So SWBST_MODE_MASK should be 0xC, and SWBST_MODE_xx should be ([mode] << 2).

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h
index 57b9ca94afc1204378e62dc009ce0ad27932ad0f..cb1060558a6ae0530c7cd2229240987bf68b5fd5 100644 (file)
--- a/include/power/pfuze100_pmic.h
+++ b/include/power/pfuze100_pmic.h
@@ -193,11 +193,11 @@ enum {
 #define SWBST_5_15V    3
 
 #define SWBST_VOL_MASK 0x3
-#define SWBST_MODE_MASK        0x6
-#define SWBST_MODE_OFF (2 << 0)
-#define SWBST_MODE_PFM (2 << 1)
+#define SWBST_MODE_MASK        0xC
+#define SWBST_MODE_OFF (0 << 2)
+#define SWBST_MODE_PFM (1 << 2)
 #define SWBST_MODE_AUTO        (2 << 2)
-#define SWBST_MODE_APS (2 << 3)
+#define SWBST_MODE_APS (3 << 2)
 
 /*
  * Regulator Mode Control