x86: Set up the MTRR for SDRAM

Set up MTRRs for the FSP SDRAM regions to improve performance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 987cb4f8f31db040f08405a0b7069cae9ddd6b10..9ce0ddf0d3d60e57f49e8c0670165f76bee6498c 100644 (file)
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -9,6 +9,7 @@
 #include <asm/fsp/fsp_support.h>
 #include <asm/e820.h>
 #include <asm/mrccache.h>
+#include <asm/mtrr.h>
 #include <asm/post.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -61,6 +62,8 @@ int dram_init_banksize(void)
 
                gd->bd->bi_dram[bank].start = res_desc->phys_start;
                gd->bd->bi_dram[bank].size = res_desc->len;
+               mtrr_add_request(MTRR_TYPE_WRBACK, res_desc->phys_start,
+                                res_desc->len);
                log_debug("ram %llx %llx\n", gd->bd->bi_dram[bank].start,
                          gd->bd->bi_dram[bank].size);
        }
@@ -69,6 +72,8 @@ int dram_init_banksize(void)
        gd->bd->bi_dram[0].start = 0;
        gd->bd->bi_dram[0].size = low_end;
 
+       mtrr_add_request(MTRR_TYPE_WRBACK, 0, low_end);
+
        return 0;
 }