During some tests to check the pixel clock rate in the transition from
U-Boot to the Linux kernel, I noticed that with the same configuration
of the registers the debug messages reported different rates.
The same Linux kernel calculations are now used to get the PLL video
rate.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
static u32 decode_pll(enum pll_clocks pll, u32 infreq)
{
u32 div, test_div, pll_num, pll_denom;
+ u64 temp64;
switch (pll) {
case PLL_SYS:
}
test_div = 1 << (2 - test_div);
- return infreq * (div + pll_num / pll_denom) / test_div;
+ temp64 = (u64)infreq;
+ temp64 *= pll_num;
+ do_div(temp64, pll_denom);
+ return infreq * div + (unsigned long)temp64;
default:
return 0;
}