x86: apl: Add PCH driver

Add a driver for the Apollo Lake Platform Controller Hub. It does not have
any functionality and is just a placeholder for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/apollolake/Makefile b/arch/x86/cpu/apollolake/Makefile
index 31045a03c1b004413e874af0aa1e7c79b1f56dba..36eefcbad75df53f836a941d0b66c21637947b32 100644 (file)
--- a/arch/x86/cpu/apollolake/Makefile
+++ b/arch/x86/cpu/apollolake/Makefile
@@ -7,5 +7,6 @@ obj-$(CONFIG_SPL_BUILD) += systemagent.o
 obj-y += hostbridge.o
 obj-y += itss.o
 obj-y += lpc.o
+obj-y += pch.o
 obj-y += pmc.o
 obj-y += uart.o

diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c
new file mode 100644 (file)
index 0000000..1a5a985
--- /dev/null
+++ b/arch/x86/cpu/apollolake/pch.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pch.h>
+#include <spl.h>
+#include <asm/lpc_common.h>
+
+#define BIOS_CTRL      0xdc
+
+static int apl_set_spi_protect(struct udevice *dev, bool protect)
+{
+       if (spl_phase() == PHASE_SPL)
+               return lpc_set_spi_protect(dev, BIOS_CTRL, protect);
+
+       return 0;
+}
+
+static const struct pch_ops apl_pch_ops = {
+       .set_spi_protect = apl_set_spi_protect,
+};
+
+static const struct udevice_id apl_pch_ids[] = {
+       { .compatible = "intel,apl-pch" },
+       { }
+};
+
+U_BOOT_DRIVER(apl_pch) = {
+       .name           = "apl_pch",
+       .id             = UCLASS_PCH,
+       .of_match       = apl_pch_ids,
+       .ops            = &apl_pch_ops,
+};

diff --git a/arch/x86/include/asm/arch-apollolake/pch.h b/arch/x86/include/asm/arch-apollolake/pch.h
new file mode 100644 (file)
index 0000000..bf3e167
--- /dev/null
+++ b/arch/x86/include/asm/arch-apollolake/pch.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef _ASM_ARCH_PCH_H
+#define _ASM_ARCH_PCH_H
+
+#endif /* _ASM_ARCH_PCH_H */