unsigned long parent_rate = clk_get_parent_rate(clk);
unsigned int val;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
val = divider->io_divider_val;
#else
val = readl(divider->reg);
div->width = width;
div->flags = clk_divider_flags;
div->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
div->io_divider_val = *(u32 *)reg;
#endif
if (set)
reg |= BIT(gate->bit_idx);
} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
reg = gate->io_gate_val;
#else
reg = readl(gate->reg);
struct clk_gate *gate = to_clk_gate(clk);
u32 reg;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
reg = gate->io_gate_val;
#else
reg = readl(gate->reg);
gate->reg = reg;
gate->bit_idx = bit_idx;
gate->flags = clk_gate_flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
gate->io_gate_val = *(u32 *)reg;
#endif
struct clk_mux *mux = to_clk_mux(clk);
u32 val;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
val = mux->io_mux_val;
#else
val = readl(mux->reg);
if (mux->flags & CLK_MUX_HIWORD_MASK) {
reg = mux->mask << (mux->shift + 16);
} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
reg = mux->io_mux_val;
#else
reg = readl(mux->reg);
}
val = val << mux->shift;
reg |= val;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
mux->io_mux_val = reg;
#else
writel(reg, mux->reg);
mux->mask = mask;
mux->flags = clk_mux_flags;
mux->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
mux->io_mux_val = *(u32 *)reg;
#endif
*/
const char * const *parent_names;
u8 num_parents;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
u32 io_mux_val;
#endif
void __iomem *reg;
u8 bit_idx;
u8 flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
u32 io_gate_val;
#endif
};
u8 width;
u8 flags;
const struct clk_div_table *table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
u32 io_divider_val;
#endif
};