]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: gateworks: venice: switch to 2-bank dram config
authorTim Harvey <tharvey@gateworks.com>
Fri, 23 Jun 2023 16:44:17 +0000 (09:44 -0700)
committerStefano Babic <sbabic@denx.de>
Thu, 13 Jul 2023 09:29:40 +0000 (11:29 +0200)
Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
board/gateworks/venice/venice.c
include/configs/imx8mm_venice.h
include/configs/imx8mn_venice.h
include/configs/imx8mp_venice.h

index 3067480e6ac7f5d0f172170cd4f4a98189012e81..a39ae58c8a09570bfd352a8ea51eeb81ad264e14 100644 (file)
@@ -20,7 +20,7 @@ int board_phys_sdram_size(phys_size_t *size)
        if (!size)
                return -EINVAL;
 
-       *size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+       *size = get_ram_size((void *)PHYS_SDRAM, (long)PHYS_SDRAM_SIZE + (long)PHYS_SDRAM_2_SIZE);
 
        return 0;
 }
index b33b8283085f000f7f61e8f7afd0d90f8654fb87..046d5685d04d34ae304331e89d3cb64fe4c42454 100644 (file)
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        SZ_2M
 
+/* SDRAM configuration: 4GiB */
 #define CFG_SYS_SDRAM_BASE           0x40000000
-
-/* SDRAM configuration */
-#define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE                        SZ_4G
+#define PHYS_SDRAM                   0x40000000
+#define PHYS_SDRAM_SIZE              0x80000000      /* 2 GB */
+#define PHYS_SDRAM_2                 0xC0000000
+#define PHYS_SDRAM_2_SIZE            0x80000000      /* 2 GB */
 
 #endif
index 3db997e9e7f4130e4c1733d0ea925152cfd6b6df..1cc054a82ba146bb13070dedddd01ba979a6e51d 100644 (file)
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        SZ_2M
 
+/* SDRAM configuration: 4GiB */
 #define CFG_SYS_SDRAM_BASE           0x40000000
-
-/* SDRAM configuration */
-#define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE                        SZ_4G
+#define PHYS_SDRAM                   0x40000000
+#define PHYS_SDRAM_SIZE              0x80000000      /* 2 GB */
+#define PHYS_SDRAM_2                 0xC0000000
+#define PHYS_SDRAM_2_SIZE            0x80000000      /* 2 GB */
 
 #endif
index b5ee8c98fbbea15ef510127428cf6d7d55b78b2b..47413ecd7fbf6ba12e6aa582086b86830277b054 100644 (file)
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        SZ_2M
 
+/* SDRAM configuration: 4GiB */
 #define CFG_SYS_SDRAM_BASE           0x40000000
-
-/* SDRAM configuration */
-#define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE                        SZ_4G
+#define PHYS_SDRAM                   0x40000000
+#define PHYS_SDRAM_SIZE              0x80000000      /* 2 GB */
+#define PHYS_SDRAM_2                 0xC0000000
+#define PHYS_SDRAM_2_SIZE            0x80000000      /* 2 GB */
 
 #endif