#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1)
#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000))
-#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC)
-
/* Timer */
#ifdef CONFIG_MCFTMR
#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC)
#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000))
-#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC)
/* Timer */
#ifdef CONFIG_MCFTMR
#endif
#define MMAP_DSPI MMAP_DSPI0
-#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC)
/* Timer */
#ifdef CONFIG_MCFTMR
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
+CONFIG_MCFRTC=y
+CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
+CONFIG_MCFRTC=y
+CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
+CONFIG_MCFRTC=y
+CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
+CONFIG_MCFRTC=y
+CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MCFRTC=y
+CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
CONFIG_WATCHDOG=y
clock with a wide array of features and 50 bytes of general-purpose,
battery-backed RAM. The driver supports access to the clock and RAM.
+config MCFRTC
+ bool "Use common CF RTC driver"
+ depends on M68K
+
+config SYS_MCFRTC_BASE
+ hex "Base address for RTC in immap.h"
+ depends on MCFRTC
+
config RTC_M41T62
bool "Enable M41T62 driver"
help
#undef RTC_DEBUG
-#ifndef CONFIG_SYS_MCFRTC_BASE
-#error RTC_BASE is not defined!
-#endif
-
#define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0)
#define STARTOFTIME 1970
# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
-#define CONFIG_MCFRTC
-#undef RTC_DEBUG
#define CONFIG_SYS_RTC_CNT (0x8000)
#define CONFIG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN)
# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
-#define CONFIG_MCFRTC
-#undef RTC_DEBUG
-
/* I2C */
#ifdef CONFIG_MCFFEC
# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
-#define CONFIG_MCFRTC
-#undef RTC_DEBUG
-
/* I2C */
#ifdef CONFIG_MCFFEC
#define ENABLE_JFFS 1
#endif
-#define CONFIG_MCFRTC
-#undef RTC_DEBUG
-
/* I2C */
/*
""
/* Realtime clock */
-#undef CONFIG_MCFRTC
#define CONFIG_RTC_MCFRRTC
#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000