]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_DIMM_SLOTS_PER_CTLR to Kconfig
authorTom Rini <trini@konsulko.com>
Wed, 30 Mar 2022 22:07:31 +0000 (18:07 -0400)
committerTom Rini <trini@konsulko.com>
Fri, 8 Apr 2022 14:46:22 +0000 (10:46 -0400)
This converts the following to Kconfig:
   CONFIG_DIMM_SLOTS_PER_CTLR

Signed-off-by: Tom Rini <trini@konsulko.com>
65 files changed:
configs/T2080QDS_NAND_defconfig
configs/T2080QDS_SDCARD_defconfig
configs/T2080QDS_SECURE_BOOT_defconfig
configs/T2080QDS_SPIFLASH_defconfig
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
configs/T2080QDS_defconfig
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
configs/ls1028aqds_tfa_defconfig
configs/ls1028aqds_tfa_lpuart_defconfig
configs/ls2080aqds_SECURE_BOOT_defconfig
configs/ls2080aqds_defconfig
configs/ls2080aqds_nand_defconfig
configs/ls2080aqds_qspi_defconfig
configs/ls2080aqds_sdcard_defconfig
configs/ls2080ardb_SECURE_BOOT_defconfig
configs/ls2080ardb_defconfig
configs/ls2080ardb_nand_defconfig
configs/ls2081ardb_defconfig
configs/ls2088aqds_tfa_defconfig
configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
configs/ls2088ardb_qspi_defconfig
configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
configs/ls2088ardb_tfa_defconfig
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
configs/lx2160aqds_tfa_defconfig
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
configs/lx2160ardb_tfa_defconfig
configs/lx2160ardb_tfa_stmm_defconfig
configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
configs/lx2162aqds_tfa_defconfig
configs/lx2162aqds_tfa_verified_boot_defconfig
drivers/ddr/fsl/Kconfig
include/configs/MPC8548CDS.h
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/corenet_ds.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/kmcent2.h
include/configs/kontron_sl28.h
include/configs/ls1012a2g5rdb.h
include/configs/ls1012afrdm.h
include/configs/ls1012afrwy.h
include/configs/ls1012aqds.h
include/configs/ls1012ardb.h
include/configs/ls1021aqds.h
include/configs/ls1028aqds.h
include/configs/ls1028ardb.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046afrwy.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/lx2160a_common.h
include/configs/p1_p2_rdb_pc.h
include/configs/socrates.h
include/configs/ten64.h

index 66883c78b82c1303c9a003c3d93468fcc4a83e4b..a69ab1eaaad64f16f0db4ba42751a191f26363f9 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
index 3a01904a486ab81bdec2ca134ac416b03f96ded2..565476f7665e22b9ead0067e68ab8175ec0b136f 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
index a7e62174de67c9139d1aa20f749a9caa50eb8fbd..d5ed28336763b1ca5de6f77c9e7fc5ce09ff372d 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
index 9a7acf17ef1fbb4ee2b3dfb8ad2c35c61c148c9a..d5c6dbd9dbe9b55530e721c684afe206063f3479 100644 (file)
@@ -64,6 +64,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
index af8e73a9168784e2b0989eeced057655152e834b..92d037cffab6b750d6055ca4d45b2b5e59ea8b82 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
index 3967269f655b0dcc081707ae82ae4705effecbbe..60ea40ba46b11f3cc4bc1a78da84d91a78e91cca 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
index d2dc9b703215a460d7458ed422b4958ee11a7fdf..1f32e4c03e5e01e18be9a4819efae6b35e0fff83 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_SATA=y
 CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 # CONFIG_DDR_SPD is not set
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
index 4f0a7aed11e5c4e3f425e40b5b39d00f071355c2..0e96441b99e9e7a700ead781d3b673d15a36ce22 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 # CONFIG_DDR_SPD is not set
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
index 73caf98adc4469fbd7b1ca9adc5b715107f48d09..e6920041c66f08460e1df6c793951a73aa1f923b 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 # CONFIG_DDR_SPD is not set
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
index de8605099393243ee6214e1a20bc63e753c03627..fe4a3aefecb76c81d0a719be936058a82823f6dc 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 51efbd3c67d0cdad3ad9fb58c494d336ac323692..10750fdc0dee71904ca619d478e400d4c6671459 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 2b42df0930e25876c66aacb0dae812e6b5ca9516..891ba15dcf54060cb585f4720cfe6f6983d3b639 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index ec07a490b7e09a4d39c6c9db7dae74d7c5ca48a5..4b7264636502c1c3030205696d9b4b1c59fbdea0 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index bde84ebfc3c93c9df7370e4cb30b221908571274..787fe56a2cc6a064d5316f912b4d763774a654d7 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 67e03b1f33f02b98f167d0ee38a61cacaaf954df..9952d3e7128a0387336b99ac957b4e5d1469fb5c 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 102d8b36f7ee19c5fd1e4b5d3f2bcbc61d213e1f..18bc68d89b275abdd097f8dcdc0456f2c786b136 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 5df11e31ab7dc65ff31943a29407364b4ca76bdd..55c18d6207542225322115f28b4fbe18cb990766 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 7ba18364a86d0da3f2e591d0b89f70bdb3a41fda..cbf80c91d1d8a89775b4b2141160b2ef6c8155b7 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_I2C_LEGACY=y
index 016e9c7f1be81896439a70bd79cb5c23f4830f51..9852dac2bb086cf45b35e6762cb2fa3c55fbe9a6 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 5b613012c02c3d1667d465348bfcee10f1ffe66c..540a9ee7ccb35fbb616f75c8205df6e884b9a2a6 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 654bdad12093fefa5411cde458632cdbd3447da3..9636559c8bfee0499b23cff9344fa2edb844b47f 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 3b693fa8c061e51fbec78e796994750eb33370d9..494bc18eb400562252590656a13c3f56f7e97e01 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index c0f92c6189ae7d03e2f0de1ac69395e955aada33..f3296c2e6649409efc681c39d32dd136ac567b15 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index ed56bfd26024d8ed3f1f1a6f8ca333edd03b39b7..a6dd56d93cb607442eb3d44c6c0a98c5eb971f87 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 7583bff329721256531e1b3323dd824fc6b4072b..feafc2c6612544be696da38bbb3c3c951c05228e 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index cfefd3db85a9bf580d4a7417dc86db56828539f9..298de9b5e86cafa8942b5327e4a09d438302ccc0 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 933312c63c5cac09986240e748f9d8359d7d185b..b2c95e78219f2530b021bc73a01fa9154d5544c0 100644 (file)
@@ -62,6 +62,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index c62c8730c106a0b5161394224b8b67ce3ca1a98a..7f73d80efc304688bdc527f86fa928e2d4769dd9 100644 (file)
@@ -62,6 +62,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 66ffb08de2848e10dc9c3dad558ad314b8a3b126..1ad71435906dc6a6e34037e03dfd3898fc614a8a 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 36780d901ce5da78890e9d1222906b1d0bc91739..ced443ac36a8281c475c4ee29f55393892c1fb99 100644 (file)
@@ -65,6 +65,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index cd82cd33d8a73f33890b313bca7726d993e49f55..521d075e83df438285596e0358e396caf7b8da54 100644 (file)
@@ -66,6 +66,7 @@ CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_MPC8XXX_GPIO=y
index 277167060432cf5421296990c3e81e9bfca04ee7..5925fe9e287c08138c740245a9de1a6eb3b1408c 100644 (file)
@@ -53,6 +53,10 @@ config CHIP_SELECTS_PER_CTRL
        int "Number of chip selects per controller"
        default 4
 
+config DIMM_SLOTS_PER_CTLR
+       int "Number of DIMM slots per controller"
+       default 1
+
 config SYS_FSL_DDR_VER
        int
        default 50 if SYS_FSL_DDR_VER_50
index 3467a515b6c0f0aa67031c3a7ff1cecaee365f71..244f811ff65bd66c801228735c2c74c676642f72 100644 (file)
@@ -47,8 +47,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000      /* DDR is system memory*/
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS     0x51    /* CTLR 0 DIMM 0 */
 
index 3826f414f0f7e261f0e4d797c1225092550921d7..0d8f13eeb065fc23b7d8a1ad0d8284d7a22a81a1 100644 (file)
@@ -161,8 +161,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 /* DDR3 Controller Settings */
 #define CONFIG_SYS_DDR_CS0_BNDS                0x0000003f
 #define CONFIG_SYS_DDR_CS0_CONFIG      0x80014302
index adc2be872ffd53502bb9cc03056fbf889bcc57e3..3d9e3e1c78b79302ffc90a8dbf04528c02c8e3a9 100644 (file)
@@ -91,8 +91,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x52
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
index 2e7bb67d0364b3d4d484a81474a97543fb5eff3e..bedd931b186853a2cf3a38e764edf197363a0830 100644 (file)
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
index 57a787565b9cc3ae30c72d1b5b2b91c6770ebe17..8ef6068cb91a89b045fbf40d8d5548319bbbf3fa 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
 
index 1ff2a6147f440e9d21a3282579db2f2041abe3c5..c04c63586946d31cfb96aafb16da18a4cc4a73cf 100644 (file)
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
index 5cd987b686a37c17c017b9d6348f6399776e83b4..3c13905729a31f850eada2f6988cfc84a7237fd0 100644 (file)
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
index 610e36e94f2f8dc11824f08a4331470a8503e29b..834855c336c922c9ec936ac441568662eb8db867 100644 (file)
@@ -92,8 +92,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 /*
  * IFC Definitions
  */
index 3a939b0b5d1ea8382ddc5cf147b5643eb0914afa..121963fe5ce5ff6cc6556bb9a0719c1bf21c893d 100644 (file)
@@ -94,8 +94,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
index 3285ae5987a86b7c3b4e6e001e018ee4cefc6194..0494790c84facb7ad3cdb1f2a39ac3da3f589d52 100644 (file)
@@ -22,8 +22,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS             0x54
 
index dd247eda987d8aa942187e85c73d451ea0bceaf9..dc45d16bfe1a6af3e54411c6b7b0c2d691287528 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x54
 #define CONFIG_SYS_SDRAM_SIZE  4096    /* for fixed parameter use */
index 77ea1327f9a4e26e773f90c61bb6181caa3d39e4..97286b6180a67dd610fd4fc4d12073e53af363a7 100644 (file)
@@ -19,7 +19,6 @@
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
index 8191c856a93f91e517a1660b8472c2c3062637ae..835eca7726dd70848aa2fa4d5daf18a85b2fd83b 100644 (file)
@@ -9,7 +9,6 @@
 #include "ls1012a_common.h"
 
 /* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
 /* SATA */
index 7735a005e20aa852351989da290522f9d3c612f4..44518cdf6412c9f3185268f27ed256366def9e8a 100644 (file)
@@ -9,7 +9,6 @@
 #include "ls1012a_common.h"
 
 /* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_SDRAM_SIZE          0x20000000
 
 #ifndef CONFIG_SPL_BUILD
index 7d8d6ee085f379ac8e90aff022acb2f12e43a48b..16ce89233fbb3a9a84e2c1422ded1614292221ec 100644 (file)
@@ -13,7 +13,6 @@
 #define BOARD_REV_C                    0x00080000
 #define BOARD_REV_MASK                 0x001A0000
 /* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define SYS_SDRAM_SIZE_512             0x20000000
 #define SYS_SDRAM_SIZE_1024            0x40000000
 
index d57f28e4967ede2ffabd95d6acae029634e1a58c..dff9a5baf53586286f22e5bc3cf67c4986193037 100644 (file)
@@ -10,7 +10,6 @@
 #include "ls1012a_common.h"
 
 /* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
 /*
index c51c4f2d3eabe6f453c64e9756b8438ec678b951..2490ba3212a844a2f5c8905ce7b28dd21ffed6ca 100644 (file)
@@ -10,7 +10,6 @@
 #include "ls1012a_common.h"
 
 /* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
 
 /*
index 16c1741af2516a9df0f89d0c99839be828c62fc8..1d00c3832f5572548319ecce762dea88a7784ac0 100644 (file)
@@ -49,7 +49,6 @@
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
index 8d60727c08f19ef530ef7adb6da00c66dead4784..956eed7aa705ebb60cd57c5eb7d9c1f8765bce03 100644 (file)
@@ -10,9 +10,6 @@
 
 #define COUNTER_FREQUENCY_REAL         (get_board_sys_clk() / 4)
 
-/* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR             2
-
 #define CONFIG_QIXIS_I2C_ACCESS
 
 /*
index 7de186aa3479a155d4b8946888d717022e1e7dea..b097f31f437e24e7648443c074223af271bf9dc9 100644 (file)
@@ -14,8 +14,6 @@
 
 /* Store environment at top of flash */
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR          1
-
 #define CONFIG_QIXIS_I2C_ACCESS
 
 /*
index 3ffc4bf0d8b51142ce02c9c33e319fbb3e3f3404..b1112d56f787d5100fa00ecac2164e3c4ef47b2d 100644 (file)
@@ -10,7 +10,6 @@
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS             0x51
index cc15462cb19c5ecb3e22bbd8116995ff65039fbe..3ac4cb7643db96501bae1ab1932a8c87dd038657 100644 (file)
@@ -10,7 +10,6 @@
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
 
 #define CONFIG_SYS_SPD_BUS_NUM         0
index d803fb746b02eaaaa1b6e2b85ae31007c811a49b..d56d0c029474435843d7648244e00aa6c2e7ef17 100644 (file)
@@ -10,8 +10,6 @@
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_UBOOT_BASE          0x40100000
 
 /*
index 434a5e172f2f70c27db2181c7d832b3f2da82ccf..2a69dbff0b30c2d4d84dc7e118d678f65e9ce988 100644 (file)
@@ -10,7 +10,6 @@
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS             0x51
index df699bca34a9a275a169a6616973646861c66565..3dfbae268e4ec7b281f6daf36011d4df809e2e4a 100644 (file)
@@ -11,7 +11,6 @@
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS             0x51
index 9e4db33044383acd985d794c36f4e81728182dc9..5a33d3a128eeff373658cd8b1e180b7caa9d4204 100644 (file)
@@ -18,8 +18,6 @@
 #define COUNTER_FREQUENCY_REAL         (get_board_sys_clk()/4)
 #define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
index 0a1a48beba052e92599a931ab8ec7d6eb59ac182..c3df0046d4ef91df42071f52dff4d8f726742e64 100644 (file)
@@ -26,7 +26,6 @@
 #endif
 #define SPD_EEPROM_ADDRESS     0x51
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
 
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
index 68ccc27c7aadb3404dc98b09378508f63ad0dd02..321575b4795805e11184d1306b405659bc381936 100644 (file)
@@ -26,7 +26,6 @@
 #define SPD_EEPROM_ADDRESS6    0x56    /* dummy address */
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
-#define CONFIG_DIMM_SLOTS_PER_CTLR             2
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
index 1e90f94d50e808cf0ff00d15df391b7a202f5317..75774d0ae450e638ef2fbdc0ebeaabd3e9586814 100644 (file)
@@ -36,7 +36,6 @@
 #define SPD_EEPROM_ADDRESS6    0x56    /* dummy address */
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM 0       /* SPD on I2C bus 0 */
-#define CONFIG_DIMM_SLOTS_PER_CTLR             2
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
index 38c4c31023745ceffcea305ac4ccbecbf0d5b9dd..b1f676070c209e1179f57d0a416cc85e4f790531 100644 (file)
@@ -33,7 +33,6 @@
 #define SPD_EEPROM_ADDRESS6            0x56
 #define SPD_EEPROM_ADDRESS             SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM         0       /* SPD on I2C bus 0 */
-#define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_SYS_MONITOR_LEN         (936 * 1024)
 
 /* Miscellaneous configurable options */
index c2fc3b04357f94f6f2e435e898ee2de1ceda1b57..17b9021fbf863b2398bdcd77c9fc0e37c6d5d0ab 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 /* Default settings for DDR3 */
 #ifndef CONFIG_TARGET_P2020RDB
 #define CONFIG_SYS_DDR_CS0_BNDS                0x0000003f
index 687e3a827dbe60225bc59d1f5566737accf7efbf..daba8278c6a32fa35619a79cec495e2297fa0bc4 100644 (file)
@@ -59,8 +59,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_VERY_BIG_RAM
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS     0x50    /* CTLR 0 DIMM 0 */
 
index 1a62ddf45dbcf10a482ff42dbebe5a7289254b7d..f82b1e0d212a50b9e73471064e328ead894632b2 100644 (file)
@@ -11,8 +11,6 @@
 
 #define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
-
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
 #define QSPI_NOR_BOOTCOMMAND   "run distro_bootcmd"