imx-common: timer: add i.MX6UL support

Add i.MX6UL GPT timer support.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>

diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index c12556addfce268d75077e0cdc4709bcc8f44dfe..1a88ce686249c3827bfc0f4354703baf8d9a58f1 100644 (file)
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -45,7 +45,8 @@ static inline int gpt_has_clk_source_osc(void)
 #if defined(CONFIG_MX6)
        if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
            (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) ||
-            is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX))
+            is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) ||
+            is_cpu_type(MXC_CPU_MX6UL))
                return 1;
 
        return 0;
@@ -103,10 +104,11 @@ int timer_init(void)
        if (gpt_has_clk_source_osc()) {
                i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
 
-               /* For DL/S, SX, set 24Mhz OSC Enable bit and prescaler */
+               /* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */
                if (is_cpu_type(MXC_CPU_MX6DL) ||
                    is_cpu_type(MXC_CPU_MX6SOLO) ||
-                   is_cpu_type(MXC_CPU_MX6SX)) {
+                   is_cpu_type(MXC_CPU_MX6SX) ||
+                   is_cpu_type(MXC_CPU_MX6UL)) {
                        i |= GPTCR_24MEN;
 
                        /* Produce 3Mhz clock */