rockchip: spl: veyron speedy boots from SPI

Apparently speedy was forgotten from this list of veyron devices.

Fixes: 49105fb7ed ("rockchip: add common spl board file")
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ec2f66d18872c71872387d33b7439d8fbf7615f9..46b32eb345845d2eae6889bcdb798b82cf7c4c86 100644 (file)
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -53,7 +53,8 @@ u32 spl_boot_device(void)
 
 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
                defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
-               defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
+               defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
+               defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
        return BOOT_DEVICE_SPI;
 #endif
        if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))