rockchip: rk3368: remove setup of secure timer from TPL/SPL

When using DM timers w/ the timer0 block within the RK3368, we no
longer depend on the ARMv8 generic timer counting.  This allows us to
drop the secure timer initialisation from the TPL and SPL stages.

The secure timer will later be set up by ATF, which starts the ARMv8
generic timer.  Thus, there will be a dependency from Linux to the ATF
through the ARMv8 generic timer... this seems reasonable, as Linux
will require the ATF (and PSCI) to start up the secondary cores anyway
(in other words: we don't add any new dependencies).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index 691db417571e39f25b0785944920b90c630ff68d..cabf34448643ef232288833321a0bbe218a803f6 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -19,23 +19,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*
- * The ARMv8 generic timer uses the STIMER1 as its clock-source.
- * Set up the STIMER1 to free-running (i.e. auto-reload) to start
- * the generic timer counting (if we don't do this, udelay will not
- * work and block indefinitively).
- */
-static void secure_timer_init(void)
-{
-       struct rk_timer * const stimer1 =
-               (struct rk_timer * const)0xff830020;
-       const u32 TIMER_EN = BIT(0);
-
-       writel(~0u, &stimer1->timer_load_count0);
-       writel(~0u, &stimer1->timer_load_count1);
-       writel(TIMER_EN, &stimer1->timer_ctrl_reg);
-}
-
 void board_debug_uart_init(void)
 {
 }
@@ -52,9 +35,6 @@ void board_init_f(ulong dummy)
                hang();
        }
 
-       /* Make sure the ARMv8 generic timer counts */
-       secure_timer_init();
-
        /* Set up our preloader console */
        ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
        if (ret) {

diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index 1a69da2bd84d5ca7ec79066d4e86dedca96c72c8..b3e6ffa781b0e92a3ec304bd9a8e09a797c7980d 100644 (file)
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -20,23 +20,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*
- * The ARMv8 generic timer uses the STIMER1 as its clock-source.
- * Set up the STIMER1 to free-running (i.e. auto-reload) to start
- * the generic timer counting (if we don't do this, udelay will not
- * work and block indefinitively).
- */
-static void secure_timer_init(void)
-{
-       struct rk_timer * const stimer1 =
-               (struct rk_timer * const)0xff830020;
-       const u32 TIMER_EN = BIT(0);
-
-       writel(~0u, &stimer1->timer_load_count0);
-       writel(~0u, &stimer1->timer_load_count1);
-       writel(TIMER_EN, &stimer1->timer_ctrl_reg);
-}
-
 /*
  * The SPL (and also the full U-Boot stage on the RK3368) will run in
  * secure mode (i.e. EL3) and an ATF will eventually be booted before
@@ -153,8 +136,6 @@ void board_init_f(ulong dummy)
                hang();
        }
 
-       /* Make sure the ARMv8 generic timer counts */
-       secure_timer_init();
        /* Reset security, so we can use DMA in the MMC drivers */
        sgrf_init();