riscv: dts: jh7110: Add rng device tree node

Adds jh7110 trng device tree node.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index ec237a46ffbaad6e67ca0566b993b4d2b2785fed..13c47f7caa36a4c5ebd01ecfac977fd91f0a2045 100644 (file)
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -627,6 +627,16 @@
                        status = "disabled";
                };
 
+               rng: rng@1600c000 {
+                       compatible = "starfive,jh7110-trng";
+                       reg = <0x0 0x1600C000 0x0 0x4000>;
+                       clocks = <&stgcrg JH7110_STGCLK_SEC_HCLK>,
+                                <&stgcrg JH7110_STGCLK_SEC_MISCAHB>;
+                       clock-names = "hclk", "ahb";
+                       resets = <&stgcrg JH7110_STGRST_SEC_TOP_HRESETN>;
+                       interrupts = <30>;
+               };
+
                aoncrg: clock-controller@17000000 {
                        compatible = "starfive,jh7110-aoncrg";
                        reg = <0x0 0x17000000 0x0 0x10000>;