armv8: fsl-layerscape: Update I2C clock divider

By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 54d03ae622d59f27c77c1ef67a1ef5077981a7a4..24c606a2328f470ba53fb527851c633c62f63188 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -501,6 +501,10 @@ config SYS_FSL_I2C_CLK_DIV
 config SYS_FSL_IFC_CLK_DIV
        int "IFC clock divider"
        default 1 if ARCH_LS1043A
+       default 4 if ARCH_LS1012A
+       default 4 if ARCH_LS1028A
+       default 8 if ARCH_LX2160A
+       default 8 if ARCH_LS1088A
        default 2
        help
          This is the divider that is used to derive IFC clock from Platform