sunxi: video: Convert panel I2C to use DM_I2C

Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).

Since the i2c-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.

This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 83f8f9513f697c4fedc720f4a7cf3909e5732c08..c1e762a51846dc72dd0dabfca5229a79ba49dfd2 100644 (file)
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -909,27 +909,18 @@ config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 config VIDEO_LCD_PANEL_I2C
        bool "LCD panel needs to be configured via i2c"
        depends on VIDEO_SUNXI
-       select CMD_I2C
+       select DM_I2C
+       select DM_I2C_GPIO
        ---help---
        Say y here if the LCD panel needs to be configured via i2c. This
        will add a bitbang i2c controller using gpios to talk to the LCD.
 
-config VIDEO_LCD_PANEL_I2C_SDA
-       string "LCD panel i2c interface SDA pin"
-       depends on VIDEO_LCD_PANEL_I2C
-       default "PG12"
-       ---help---
-       Set the SDA pin for the LCD i2c interface. This takes a string in the
-       format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
-
-config VIDEO_LCD_PANEL_I2C_SCL
-       string "LCD panel i2c interface SCL pin"
+config VIDEO_LCD_PANEL_I2C_NAME
+       string "LCD panel i2c interface node name"
        depends on VIDEO_LCD_PANEL_I2C
-       default "PG10"
+       default "i2c@0"
        ---help---
-       Set the SCL pin for the LCD i2c interface. This takes a string in the
-       format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
-
+       Set the device tree node name for the LCD i2c interface.
 
 # Note only one of these may be selected at a time! But hidden choices are
 # not supported by Kconfig

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 65cb3a6fe311ac578f112d2765be8cd8b878e1f4..4f5747c34a9597c6e5ee97f96d726fe5375c0173 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -47,47 +47,6 @@
 #include <asm/setup.h>
 #include <status_led.h>
 
-#if defined(CONFIG_VIDEO_LCD_PANEL_I2C)
-/* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */
-int soft_i2c_gpio_sda;
-int soft_i2c_gpio_scl;
-
-static int soft_i2c_board_init(void)
-{
-       int ret;
-
-       soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA);
-       if (soft_i2c_gpio_sda < 0) {
-               printf("Error invalid soft i2c sda pin: '%s', err %d\n",
-                      CONFIG_VIDEO_LCD_PANEL_I2C_SDA, soft_i2c_gpio_sda);
-               return soft_i2c_gpio_sda;
-       }
-       ret = gpio_request(soft_i2c_gpio_sda, "soft-i2c-sda");
-       if (ret) {
-               printf("Error requesting soft i2c sda pin: '%s', err %d\n",
-                      CONFIG_VIDEO_LCD_PANEL_I2C_SDA, ret);
-               return ret;
-       }
-
-       soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL);
-       if (soft_i2c_gpio_scl < 0) {
-               printf("Error invalid soft i2c scl pin: '%s', err %d\n",
-                      CONFIG_VIDEO_LCD_PANEL_I2C_SCL, soft_i2c_gpio_scl);
-               return soft_i2c_gpio_scl;
-       }
-       ret = gpio_request(soft_i2c_gpio_scl, "soft-i2c-scl");
-       if (ret) {
-               printf("Error requesting soft i2c scl pin: '%s', err %d\n",
-                      CONFIG_VIDEO_LCD_PANEL_I2C_SCL, ret);
-               return ret;
-       }
-
-       return 0;
-}
-#else
-static int soft_i2c_board_init(void) { return 0; }
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 void i2c_init_board(void)
@@ -312,8 +271,7 @@ int board_init(void)
 #endif
 #endif /* CONFIG_DM_MMC */
 
-       /* Uses dm gpio code so do this here and not in i2c_init_board() */
-       return soft_i2c_board_init();
+       return 0;
 }
 
 /*

diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index 31541f898d4e6dab41eb970028874fa12e33eb30..270bd7d351a92b05e18d96008a4397d8a9ef7f42 100644 (file)
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -13,15 +13,9 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0
 CONFIG_VIDEO_LCD_POWER="PH27"
 CONFIG_VIDEO_LCD_BL_EN="PM1"
 CONFIG_VIDEO_LCD_BL_PWM="PH13"
-CONFIG_VIDEO_LCD_PANEL_I2C_SDA="PA23"
-CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
 CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
-CONFIG_SYS_I2C_SOFT=y
-CONFIG_SYS_I2C_SOFT_SPEED=50000
-CONFIG_SYS_I2C_SOFT_SLAVE=0x00
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig
index b5728073086313f86f40b3362e3aa154cb4a835d..b021b0a8865cb9a03ab44bb9a07ad134431b27c7 100644 (file)
--- a/configs/UTOO_P66_defconfig
+++ b/configs/UTOO_P66_defconfig
@@ -21,9 +21,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2"
 CONFIG_VIDEO_LCD_TL059WV5C0=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C=y
-CONFIG_SYS_I2C_SOFT=y
-CONFIG_SYS_I2C_SOFT_SPEED=50000
-CONFIG_SYS_I2C_SOFT_SLAVE=0x00
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
index 3037ff39b41f7ad2daf727132858e83a141ffe1b..52b5988ba5f23e4f342342d140c4f27ea729e80b 100644 (file)
--- a/drivers/video/anx9804.c
+++ b/drivers/video/anx9804.c
@@ -21,18 +21,23 @@
  * This function will init an anx9804 parallel lcd to dp bridge chip
  * using the passed in parameters.
  *
- * @i2c_bus:   Number of the i2c bus to which the anx9804 is connected.
+ * @i2c_bus:   Device of the i2c bus to which the anx9804 is connected.
  * @lanes:     Number of displayport lanes to use
  * @data_rate: Register value for the bandwidth reg 0x06: 1.62G, 0x0a: 2.7G
  * @bpp:       Bits per pixel, must be 18 or 24
  */
-void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)
+void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp)
 {
-       unsigned int orig_i2c_bus = i2c_get_bus_num();
-       u8 c, colordepth;
-       int i;
+       struct udevice *chip0, *chip1;
+       int c, colordepth, i, ret;
 
-       i2c_set_bus_num(i2c_bus);
+       ret = i2c_get_chip(i2c_bus, 0x38, 1, &chip0);
+       if (ret)
+               return;
+
+       ret = i2c_get_chip(i2c_bus, 0x39, 1, &chip1);
+       if (ret)
+               return;
 
        if (bpp == 18)
                colordepth = 0x00; /* 6 bit */
@@ -40,24 +45,23 @@ void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)
                colordepth = 0x10; /* 8 bit */
 
        /* Reset */
-       i2c_reg_write(0x39, ANX9804_RST_CTRL_REG, 1);
+       dm_i2c_reg_write(chip1, ANX9804_RST_CTRL_REG, 1);
        mdelay(100);
-       i2c_reg_write(0x39, ANX9804_RST_CTRL_REG, 0);
+       dm_i2c_reg_write(chip1, ANX9804_RST_CTRL_REG, 0);
 
        /* Write 0 to the powerdown reg (powerup everything) */
-       i2c_reg_write(0x39, ANX9804_POWERD_CTRL_REG, 0);
+       dm_i2c_reg_write(chip1, ANX9804_POWERD_CTRL_REG, 0);
 
-       c = i2c_reg_read(0x39, ANX9804_DEV_IDH_REG);
+       c = dm_i2c_reg_read(chip1, ANX9804_DEV_IDH_REG);
        if (c != 0x98) {
                printf("Error anx9804 chipid mismatch\n");
-               i2c_set_bus_num(orig_i2c_bus);
                return;
        }
 
        for (i = 0; i < 100; i++) {
-               c = i2c_reg_read(0x38, ANX9804_SYS_CTRL2_REG);
-               i2c_reg_write(0x38, ANX9804_SYS_CTRL2_REG, c);
-               c = i2c_reg_read(0x38, ANX9804_SYS_CTRL2_REG);
+               c = dm_i2c_reg_read(chip0, ANX9804_SYS_CTRL2_REG);
+               dm_i2c_reg_write(chip0, ANX9804_SYS_CTRL2_REG, c);
+               c = dm_i2c_reg_read(chip0, ANX9804_SYS_CTRL2_REG);
                if ((c & ANX9804_SYS_CTRL2_CHA_STA) == 0)
                        break;
 
@@ -66,51 +70,51 @@ void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)
        if (i == 100)
                printf("Error anx9804 clock is not stable\n");
 
-       i2c_reg_write(0x39, ANX9804_VID_CTRL2_REG, colordepth);
+       dm_i2c_reg_write(chip1, ANX9804_VID_CTRL2_REG, colordepth);
 
        /* Set a bunch of analog related register values */
-       i2c_reg_write(0x38, ANX9804_PLL_CTRL_REG, 0x07);
-       i2c_reg_write(0x39, ANX9804_PLL_FILTER_CTRL3, 0x19);
-       i2c_reg_write(0x39, ANX9804_PLL_CTRL3, 0xd9);
-       i2c_reg_write(0x39, ANX9804_RST_CTRL2_REG, ANX9804_RST_CTRL2_AC_MODE);
-       i2c_reg_write(0x39, ANX9804_ANALOG_DEBUG_REG1, 0xf0);
-       i2c_reg_write(0x39, ANX9804_ANALOG_DEBUG_REG3, 0x99);
-       i2c_reg_write(0x39, ANX9804_PLL_FILTER_CTRL1, 0x7b);
-       i2c_reg_write(0x38, ANX9804_LINK_DEBUG_REG, 0x30);
-       i2c_reg_write(0x39, ANX9804_PLL_FILTER_CTRL, 0x06);
+       dm_i2c_reg_write(chip0, ANX9804_PLL_CTRL_REG, 0x07);
+       dm_i2c_reg_write(chip1, ANX9804_PLL_FILTER_CTRL3, 0x19);
+       dm_i2c_reg_write(chip1, ANX9804_PLL_CTRL3, 0xd9);
+       dm_i2c_reg_write(chip1, ANX9804_RST_CTRL2_REG, ANX9804_RST_CTRL2_AC_MODE);
+       dm_i2c_reg_write(chip1, ANX9804_ANALOG_DEBUG_REG1, 0xf0);
+       dm_i2c_reg_write(chip1, ANX9804_ANALOG_DEBUG_REG3, 0x99);
+       dm_i2c_reg_write(chip1, ANX9804_PLL_FILTER_CTRL1, 0x7b);
+       dm_i2c_reg_write(chip0, ANX9804_LINK_DEBUG_REG, 0x30);
+       dm_i2c_reg_write(chip1, ANX9804_PLL_FILTER_CTRL, 0x06);
 
        /* Force HPD */
-       i2c_reg_write(0x38, ANX9804_SYS_CTRL3_REG,
-                     ANX9804_SYS_CTRL3_F_HPD | ANX9804_SYS_CTRL3_HPD_CTRL);
+       dm_i2c_reg_write(chip0, ANX9804_SYS_CTRL3_REG,
+                        ANX9804_SYS_CTRL3_F_HPD | ANX9804_SYS_CTRL3_HPD_CTRL);
 
        /* Power up and configure lanes */
-       i2c_reg_write(0x38, ANX9804_ANALOG_POWER_DOWN_REG, 0x00);
-       i2c_reg_write(0x38, ANX9804_TRAINING_LANE0_SET_REG, 0x00);
-       i2c_reg_write(0x38, ANX9804_TRAINING_LANE1_SET_REG, 0x00);
-       i2c_reg_write(0x38, ANX9804_TRAINING_LANE2_SET_REG, 0x00);
-       i2c_reg_write(0x38, ANX9804_TRAINING_LANE3_SET_REG, 0x00);
+       dm_i2c_reg_write(chip0, ANX9804_ANALOG_POWER_DOWN_REG, 0x00);
+       dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE0_SET_REG, 0x00);
+       dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE1_SET_REG, 0x00);
+       dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE2_SET_REG, 0x00);
+       dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE3_SET_REG, 0x00);
 
        /* Reset AUX CH */
-       i2c_reg_write(0x39, ANX9804_RST_CTRL2_REG,
-                     ANX9804_RST_CTRL2_AC_MODE | ANX9804_RST_CTRL2_AUX);
-       i2c_reg_write(0x39, ANX9804_RST_CTRL2_REG,
-                     ANX9804_RST_CTRL2_AC_MODE);
+       dm_i2c_reg_write(chip1, ANX9804_RST_CTRL2_REG,
+                        ANX9804_RST_CTRL2_AC_MODE | ANX9804_RST_CTRL2_AUX);
+       dm_i2c_reg_write(chip1, ANX9804_RST_CTRL2_REG,
+                        ANX9804_RST_CTRL2_AC_MODE);
 
        /* Powerdown audio and some other unused bits */
-       i2c_reg_write(0x39, ANX9804_POWERD_CTRL_REG, ANX9804_POWERD_AUDIO);
-       i2c_reg_write(0x38, ANX9804_HDCP_CONTROL_0_REG, 0x00);
-       i2c_reg_write(0x38, 0xa7, 0x00);
+       dm_i2c_reg_write(chip1, ANX9804_POWERD_CTRL_REG, ANX9804_POWERD_AUDIO);
+       dm_i2c_reg_write(chip0, ANX9804_HDCP_CONTROL_0_REG, 0x00);
+       dm_i2c_reg_write(chip0, 0xa7, 0x00);
 
        /* Set data-rate / lanes */
-       i2c_reg_write(0x38, ANX9804_LINK_BW_SET_REG, data_rate);
-       i2c_reg_write(0x38, ANX9804_LANE_COUNT_SET_REG, lanes);
+       dm_i2c_reg_write(chip0, ANX9804_LINK_BW_SET_REG, data_rate);
+       dm_i2c_reg_write(chip0, ANX9804_LANE_COUNT_SET_REG, lanes);
 
        /* Link training */
-       i2c_reg_write(0x38, ANX9804_LINK_TRAINING_CTRL_REG,
-                     ANX9804_LINK_TRAINING_CTRL_EN);
+       dm_i2c_reg_write(chip0, ANX9804_LINK_TRAINING_CTRL_REG,
+                        ANX9804_LINK_TRAINING_CTRL_EN);
        mdelay(5);
        for (i = 0; i < 100; i++) {
-               c = i2c_reg_read(0x38, ANX9804_LINK_TRAINING_CTRL_REG);
+               c = dm_i2c_reg_read(chip0, ANX9804_LINK_TRAINING_CTRL_REG);
                if ((c & 0x01) == 0)
                        break;
 
@@ -118,17 +122,14 @@ void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)
        }
        if(i == 100) {
                printf("Error anx9804 link training timeout\n");
-               i2c_set_bus_num(orig_i2c_bus);
                return;
        }
 
        /* Enable */
-       i2c_reg_write(0x39, ANX9804_VID_CTRL1_REG,
-                     ANX9804_VID_CTRL1_VID_EN | ANX9804_VID_CTRL1_EDGE);
+       dm_i2c_reg_write(chip1, ANX9804_VID_CTRL1_REG,
+                        ANX9804_VID_CTRL1_VID_EN | ANX9804_VID_CTRL1_EDGE);
        /* Force stream valid */
-       i2c_reg_write(0x38, ANX9804_SYS_CTRL3_REG,
-                     ANX9804_SYS_CTRL3_F_HPD | ANX9804_SYS_CTRL3_HPD_CTRL |
-                     ANX9804_SYS_CTRL3_F_VALID | ANX9804_SYS_CTRL3_VALID_CTRL);
-
-       i2c_set_bus_num(orig_i2c_bus);
+       dm_i2c_reg_write(chip0, ANX9804_SYS_CTRL3_REG,
+                        ANX9804_SYS_CTRL3_F_HPD | ANX9804_SYS_CTRL3_HPD_CTRL |
+                        ANX9804_SYS_CTRL3_F_VALID | ANX9804_SYS_CTRL3_VALID_CTRL);
 }

diff --git a/drivers/video/anx9804.h b/drivers/video/anx9804.h
index c0fe3b393b45dfd9f6a2845dc415c8770adab432..ea6c9f2d558f5fa038a80d31933d41397a18c4e7 100644 (file)
--- a/drivers/video/anx9804.h
+++ b/drivers/video/anx9804.h
@@ -16,9 +16,10 @@
 #define ANX9804_DATA_RATE_2700M                                0x0a
 
 #ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
-void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp);
+void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp);
 #else
-static inline void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate,
+static inline void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate,
                                int bpp) {}
 #endif
+
 #endif

diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index da3e89882967dab523ed4ca798a57033bcbc976a..5a21f7af668644415154d16b6fbdf8ef9957f0f6 100644 (file)
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -901,6 +901,42 @@ static int sunxi_ssd2828_init(const struct ctfb_res_modes *mode)
 }
 #endif /* CONFIG_VIDEO_LCD_SSD2828 */
 
+#ifdef CONFIG_VIDEO_LCD_PANEL_I2C
+static void sunxi_panel_i2c_init(struct sunxi_display_priv *sunxi_display)
+{
+       const char *name = CONFIG_VIDEO_LCD_PANEL_I2C_NAME;
+       struct udevice *i2c_bus;
+       int ret;
+
+       ret = uclass_get_device_by_name(UCLASS_I2C, name, &i2c_bus);
+       if (ret)
+               return;
+
+       if (IS_ENABLED(CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804)) {
+               /*
+                * The anx9804 needs 1.8V from eldo3, we do this here
+                * and not via CONFIG_AXP_ELDO3_VOLT from board_init()
+                * to avoid turning this on when using hdmi output.
+                */
+               axp_set_eldo(3, 1800);
+               anx9804_init(i2c_bus, 4,
+                            ANX9804_DATA_RATE_1620M,
+                            sunxi_display->depth);
+       }
+       if (IS_ENABLED(CONFIG_VIDEO_LCD_TL059WV5C0)) {
+               struct udevice *chip;
+
+               ret = i2c_get_chip(i2c_bus, 0x5c, 1, &chip);
+               if (ret)
+                       return;
+
+               dm_i2c_reg_write(chip, 0x04, 0x42); /* Turn on the LCD */
+       }
+}
+#else
+static void sunxi_panel_i2c_init(struct sunxi_display_priv *sunxi_display) {}
+#endif
+
 static void sunxi_engines_init(void)
 {
        sunxi_composer_init();
@@ -935,27 +971,12 @@ static void sunxi_mode_set(struct sunxi_display_priv *sunxi_display,
                break;
        case sunxi_monitor_lcd:
                sunxi_lcdc_panel_enable();
-               if (IS_ENABLED(CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804)) {
-                       /*
-                        * The anx9804 needs 1.8V from eldo3, we do this here
-                        * and not via CONFIG_AXP_ELDO3_VOLT from board_init()
-                        * to avoid turning this on when using hdmi output.
-                        */
-                       axp_set_eldo(3, 1800);
-                       anx9804_init(CONFIG_VIDEO_LCD_I2C_BUS, 4,
-                                    ANX9804_DATA_RATE_1620M,
-                                    sunxi_display->depth);
-               }
                if (IS_ENABLED(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM)) {
                        mdelay(50); /* Wait for lcd controller power on */
                        hitachi_tx18d42vm_init();
                }
-               if (IS_ENABLED(CONFIG_VIDEO_LCD_TL059WV5C0)) {
-                       unsigned int orig_i2c_bus = i2c_get_bus_num();
-                       i2c_set_bus_num(CONFIG_VIDEO_LCD_I2C_BUS);
-                       i2c_reg_write(0x5c, 0x04, 0x42); /* Turn on the LCD */
-                       i2c_set_bus_num(orig_i2c_bus);
-               }
+               if (IS_ENABLED(CONFIG_VIDEO_LCD_PANEL_I2C))
+                       sunxi_panel_i2c_init(sunxi_display);
                sunxi_composer_mode_set(mode, address, monitor);
                sunxi_lcdc_tcon0_mode_set(sunxi_display, mode, false);
                sunxi_composer_enable();

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 5d8b6052e4ff2ab6baa28058adcca464d0ebf3e7..c576d65efaf868aed67212b05fd8f37fbf606fa4 100644 (file)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -160,23 +160,6 @@
 #define CONFIG_SPL_PAD_TO              32768           /* decimal for 'dd' */
 #endif
 
-
-/* I2C */
-#if defined(CONFIG_VIDEO_LCD_PANEL_I2C)
-/* We use pin names in Kconfig and sunxi_name_to_gpio() */
-#define CONFIG_SOFT_I2C_GPIO_SDA       soft_i2c_gpio_sda
-#define CONFIG_SOFT_I2C_GPIO_SCL       soft_i2c_gpio_scl
-#ifndef __ASSEMBLY__
-extern int soft_i2c_gpio_sda;
-extern int soft_i2c_gpio_scl;
-#endif
-#define CONFIG_VIDEO_LCD_I2C_BUS       0 /* The lcd panel soft i2c is bus 0 */
-#define CONFIG_SYS_SPD_BUS_NUM         1 /* And the axp209 i2c bus is bus 1 */
-#else
-#define CONFIG_SYS_SPD_BUS_NUM         0 /* The axp209 i2c bus is bus 0 */
-#define CONFIG_VIDEO_LCD_I2C_BUS       -1 /* NA, but necessary to compile */
-#endif
-
 /* Ethernet support */
 
 #ifdef CONFIG_USB_EHCI_HCD