rockchip: clk: add watchdog clock to px30_clk_enable

Add the PCLK_WDT_NS clock to px30_clk_enable so that the watchdog driver
can probe since it wants to enable this clock.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 5d467447a175ff69c2d2aee0bab3479092065ea9..33a7348b9fc92d546d53177eceb046cf91a60710 100644 (file)
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1415,6 +1415,9 @@ static int px30_clk_enable(struct clk *clk)
        case SCLK_GMAC_RMII:
                /* Required to successfully probe the Designware GMAC driver */
                return 0;
+       case PCLK_WDT_NS:
+               /* Required to successfully probe the Designware watchdog driver */
+               return 0;
        }
 
        debug("%s: unsupported clk %ld\n", __func__, clk->id);