phy: marvell: a3700: Use comphy_mux on Armada 37xx.

Lane 0 supports SGMII1 and USB3.
Lane 1 supports SGMII0 and PEX0.
Lane 2 supports SATA0 and USB3.

This is needed for Armada 37xx.

This introduces new device tree bindings. AFAIK there is currently no
driver for Armada 37xx comphy in Linux. When such a driver will be
pushed into Linux, this will need to be rewritten accordingly.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
index 54007428ed3b83e98c2ec7704870bd2023dd1cc3..040e8568e69c6a8946208a5f8204b688d16b5ca5 100644 (file)
--- a/arch/arm/dts/armada-37xx.dtsi
+++ b/arch/arm/dts/armada-37xx.dtsi
@@ -290,8 +290,9 @@
                                compatible = "marvell,mvebu-comphy", "marvell,comphy-armada-3700";
                                reg = <0x18300 0x28>,
                                      <0x1f300 0x3d000>;
-                               mux-bitcount = <1>;
-                               max-lanes = <2>;
+                               mux-bitcount = <4>;
+                               mux-lane-order = <1 0 2>;
+                               max-lanes = <3>;
                        };
                };
 

diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index 90e594fddce2aa13126b076394081604feca0cbb..bf68f5d6bea33071e6fcd62c06e71389152ef33c 100644 (file)
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -13,6 +13,38 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct comphy_mux_data a3700_comphy_mux_data[] = {
+/* Lane 0 */
+       {
+               4,
+               {
+                       { PHY_TYPE_UNCONNECTED, 0x0 },
+                       { PHY_TYPE_SGMII1,      0x0 },
+                       { PHY_TYPE_USB3_HOST0,  0x1 },
+                       { PHY_TYPE_USB3_DEVICE, 0x1 }
+               }
+       },
+/* Lane 1 */
+       {
+               3,
+               {
+                       { PHY_TYPE_UNCONNECTED, 0x0},
+                       { PHY_TYPE_SGMII0,      0x0},
+                       { PHY_TYPE_PEX0,        0x1}
+               }
+       },
+/* Lane 2 */
+       {
+               4,
+               {
+                       { PHY_TYPE_UNCONNECTED, 0x0},
+                       { PHY_TYPE_SATA0,       0x0},
+                       { PHY_TYPE_USB3_HOST0,  0x1},
+                       { PHY_TYPE_USB3_DEVICE, 0x1}
+               }
+       },
+};
+
 struct sgmii_phy_init_data_fix {
        u16 addr;
        u16 value;
@@ -932,6 +964,10 @@ int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg,
 
        debug_enter();
 
+       /* Initialize PHY mux */
+       chip_cfg->mux_data = a3700_comphy_mux_data;
+       comphy_mux_init(chip_cfg, serdes_map, COMPHY_SEL_ADDR);
+
        for (lane = 0, comphy_map = serdes_map; lane < comphy_max_count;
             lane++, comphy_map++) {
                debug("Initialize serdes number %d\n", lane);