*/
#include <common.h>
+#include <ahci.h>
#include <blk.h>
#include <command.h>
#include <console.h>
#include <cpu_func.h>
+#include <dm.h>
+#include <dm/device-internal.h>
#include <log.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <linux/delay.h>
#include "fsl_sata.h"
-#if CONFIG_IS_ENABLED(BLK)
-#include <dm.h>
-#include <ahci.h>
-#include <blk.h>
-#include <dm/device-internal.h>
-#else
-#ifndef CONFIG_SYS_SATA1_FLAGS
- #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
-#endif
-#ifndef CONFIG_SYS_SATA2_FLAGS
- #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
-#endif
-
-static struct fsl_sata_info fsl_sata_info[] = {
-#ifdef CONFIG_SATA1
- {CONFIG_SYS_SATA1, CONFIG_SYS_SATA1_FLAGS},
-#else
- {0, 0},
-#endif
-#ifdef CONFIG_SATA2
- {CONFIG_SYS_SATA2, CONFIG_SYS_SATA2_FLAGS},
-#else
- {0, 0},
-#endif
-};
-#endif
-
static inline void sdelay(unsigned long sec)
{
unsigned long i;
return (i < timeout_msec) ? 0 : -1;
}
-#if !CONFIG_IS_ENABLED(BLK)
-int init_sata(int dev)
-#else
static int init_sata(struct fsl_ata_priv *priv, int dev)
-#endif
{
u32 length, align;
cmd_hdr_tbl_t *cmd_hdr;
snprintf(sata->name, 12, "SATA%d:", dev);
/* Set the controller register base address to device struct */
-#if !CONFIG_IS_ENABLED(BLK)
- sata_dev_desc[dev].priv = (void *)sata;
- reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
- sata->dma_flag = fsl_sata_info[dev].flags;
-#else
reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev);
sata->dma_flag = priv->flag;
priv->fsl_sata = sata;
-#endif
sata->reg_base = reg;
/* Allocate the command header table, 4 bytes aligned */
/*
* SATA interface between low level driver and command layer
*/
-#if !CONFIG_IS_ENABLED(BLK)
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
-{
- fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
-#else
static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
{
struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
-#endif
u32 rc;
if (sata->lba48)
return rc;
}
-#if !CONFIG_IS_ENABLED(BLK)
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
-{
- fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
-#else
static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer)
{
struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
-#endif
u32 rc;
if (sata->lba48) {
ata_swap_buf_le16(id, ATA_ID_WORDS);
}
-#if !CONFIG_IS_ENABLED(BLK)
-int scan_sata(int dev)
-{
- fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
-#else
static int scan_sata(struct udevice *dev)
{
struct blk_desc *desc = dev_get_uclass_plat(dev);
struct fsl_ata_priv *priv = dev_get_plat(dev);
fsl_sata_t *sata = priv->fsl_sata;
-#endif
unsigned char serial[ATA_ID_SERNO_LEN + 1];
unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
debug("Device supports LBA28\n\r");
#endif
-#if !CONFIG_IS_ENABLED(BLK)
- memcpy(sata_dev_desc[dev].product, serial, sizeof(serial));
- memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware));
- memcpy(sata_dev_desc[dev].vendor, product, sizeof(product));
- sata_dev_desc[dev].lba = (u32)n_sectors;
-#ifdef CONFIG_LBA48
- sata_dev_desc[dev].lba48 = sata->lba48;
-#endif
-#else
memcpy(desc->product, serial, sizeof(serial));
memcpy(desc->revision, firmware, sizeof(firmware));
memcpy(desc->vendor, product, sizeof(product));
desc->lba = n_sectors;
#ifdef CONFIG_LBA48
desc->lba48 = sata->lba48;
-#endif
#endif
/* Get the NCQ queue depth from device */
return 0;
}
-#if CONFIG_IS_ENABLED(BLK)
static const struct blk_ops sata_fsl_blk_ops = {
.read = sata_read,
.write = sata_write,
.remove = fsl_ata_remove,
.priv_auto = sizeof(struct fsl_ata_priv),
};
-#endif