]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
riscv: k210: Use AI as the parent clock of aisram, not PLL1
authorSean Anderson <seanga2@gmail.com>
Fri, 9 Apr 2021 02:13:12 +0000 (22:13 -0400)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Fri, 14 May 2021 08:20:49 +0000 (16:20 +0800)
Testing showed that disabling AI while leaving PLL1 enabled disabled the
aisram. This suggests that AI is a more appropriate clock for that ram
bank.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
arch/riscv/dts/k210.dtsi

index 2032f1e5c2105815fde9d99eaf40e91b2d8a6f46..75e101530b3a7b64a99d0436522db33f24be9143 100644 (file)
@@ -89,7 +89,7 @@
                reg-names = "sram0", "sram1", "aisram";
                clocks = <&sysclk K210_CLK_SRAM0>,
                         <&sysclk K210_CLK_SRAM1>,
-                        <&sysclk K210_CLK_PLL1>;
+                        <&sysclk K210_CLK_AI>;
                clock-names = "sram0", "sram1", "aisram";
                u-boot,dm-pre-reloc;
        };