board: nuvuton: arbel: Fix incorrect ram size

1. Fix incorrect ram size of 4GB dram with ECC enabled
2. Fix wrong place to set dram bank size
   - The dram bank size should be set in dram_init_banksize
   - Dram_init should not access gd->bd because the board info
     struct is not reserved yet.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
[trini: Rework slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c
index e52e0a59abcd6d0733cd983898af6b61401f73de..59e1a4256462d382324473c84b76acb9f40353b3 100644 (file)
--- a/board/nuvoton/arbel_evb/arbel_evb.c
+++ b/board/nuvoton/arbel_evb/arbel_evb.c
@@ -16,7 +16,7 @@
 #define DRAM_1GB_SIZE          0x40000000ULL
 #define DRAM_2GB_ECC_SIZE      0x70000000ULL
 #define DRAM_2GB_SIZE          0x80000000ULL
-#define DRAM_4GB_ECC_SIZE      0xE00000000ULL
+#define DRAM_4GB_ECC_SIZE      0xE0000000ULL
 #define DRAM_4GB_SIZE          0x100000000ULL
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -29,7 +29,6 @@ int board_init(void)
 int dram_init(void)
 {
        struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
-       uint64_t delta = 0ULL;
 
        /*
         * get dram active size value from bootblock.
@@ -38,18 +37,22 @@ int dram_init(void)
         */
 
        gd->ram_size = readl(&gcr->scrpad_c);
-       debug("%s: scrpad_c: %llx ", __func__, gd->ram_size);
 
-       if (gd->ram_size == 0) {
+       if (gd->ram_size == 0)
                gd->ram_size = readl(&gcr->scrpad_b);
-               debug("%s: scrpad_b: %llx ", __func__, gd->ram_size);
-       } else {
+       else
                gd->ram_size *= 0x100000ULL;
-       }
 
-       gd->bd->bi_dram[0].start = 0;
        debug("ram_size: %llx ", gd->ram_size);
 
+       return 0;
+}
+
+int dram_init_banksize(void)
+{
+
+       gd->bd->bi_dram[0].start = 0;
+
        switch (gd->ram_size) {
        case DRAM_512MB_ECC_SIZE:
        case DRAM_512MB_SIZE:
@@ -62,32 +65,28 @@ int dram_init(void)
                gd->bd->bi_dram[1].size = 0;
                break;
        case DRAM_4GB_ECC_SIZE:
-               gd->bd->bi_dram[0].size = DRAM_2GB_ECC_SIZE;
+               gd->bd->bi_dram[0].size = DRAM_2GB_SIZE;
                gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
-               gd->bd->bi_dram[1].size = DRAM_2GB_SIZE;
-               delta = DRAM_4GB_SIZE - DRAM_2GB_ECC_SIZE;
+               gd->bd->bi_dram[1].size = DRAM_2GB_SIZE -
+                       (DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE);
+               /* use bank0 only */
+               gd->ram_size = DRAM_2GB_SIZE;
                break;
        case DRAM_4GB_SIZE:
                gd->bd->bi_dram[0].size = DRAM_2GB_SIZE;
                gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
                gd->bd->bi_dram[1].size = DRAM_2GB_SIZE;
-               delta = DRAM_4GB_SIZE - DRAM_2GB_SIZE;
+               /* use bank0 only */
+               gd->ram_size = DRAM_2GB_SIZE;
                break;
        default:
                gd->bd->bi_dram[0].size = DRAM_1GB_SIZE;
                gd->bd->bi_dram[1].start = 0;
                gd->bd->bi_dram[1].size = 0;
+               gd->ram_size = DRAM_1GB_SIZE;
                break;
        }
 
-       gd->ram_size -= delta;
-
        return 0;
 }
 
-int dram_init_banksize(void)
-{
-       dram_init();
-
-       return 0;
-}