arm64: zynqmp: Describe bus-width for SD card on KV260

SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/065cb9f1c6706eb4d70066e25cfc30d17b9f875d.1695378830.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index 55bef1df75d000102f072640652ada68a8841e40..72361f6f9e4aa7f67629e893c581ec0357c0aee4 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -156,7 +156,7 @@
        disable-wp;
        xlnx,mio-bank = <1>;
        assigned-clock-rates = <187498123>;
-       bus-width = <8>;
+       bus-width = <4>;
 };
 
 &gem3 {

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index 1b1d9e772f5564ceff47d4afe4e8350d21f3bee5..44738cef23befa30330eedb7735702e149816698 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -144,7 +144,7 @@
        clk-phase-uhs-sdr25 = <120>, <60>;
        clk-phase-uhs-ddr50 = <126>, <48>;
        assigned-clock-rates = <187498123>;
-       bus-width = <8>;
+       bus-width = <4>;
 };
 
 &gem3 {