ARM: dts: at91: sam9x60: enable slewrate/high drive for sdhci0 pinout

Align the pin setup for sdhci0 with linux kernel.
This means to have slew rate enable and high drive strength.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>

diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 7f3eae3f5d26b2104dfbafc35fb1dbbf35c27f15..007646fcb43a02e5332b2abd87b729becf3fe7a6 100644 (file)
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -153,12 +153,18 @@
                                sdhci0 {
                                        pinctrl_sdhci0: sdhci0 {
                                                atmel,pins =
-                                                       <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT /* PA17 CK  periph A with pullup */
-                                                        AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP                /* PA16 CMD periph A with pullup */
-                                                        AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP                /* PA15 DAT0 periph A */
-                                                        AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP                /* PA18 DAT1 periph A with pullup */
-                                                        AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP                /* PA19 DAT2 periph A with pullup */
-                                                        AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;              /* PA20 DAT3 periph A with pullup */
+                                                       <AT91_PIOA 17 AT91_PERIPH_A
+                                                        (AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)   /* PA17 CK  periph A with pullup */
+                                                        AT91_PIOA 16 AT91_PERIPH_A
+                                                        (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)    /* PA16 CMD periph A with pullup */
+                                                        AT91_PIOA 15 AT91_PERIPH_A
+                                                        (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)    /* PA15 DAT0 periph A */
+                                                        AT91_PIOA 18 AT91_PERIPH_A
+                                                        (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)    /* PA18 DAT1 periph A with pullup */
+                                                        AT91_PIOA 19 AT91_PERIPH_A
+                                                        (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)    /* PA19 DAT2 periph A with pullup */
+                                                        AT91_PIOA 20 AT91_PERIPH_A
+                                                        (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>;  /* PA20 DAT3 periph A with pullup */
                                        };
                                };
                        };