Use uintptr_t instead of phys_addr_t where appropriate, so passing the
addresses to writel() doesn't result in compile warnings when PHYS_64BIT
is set for 32bit builds (which is actually a useful configuration, as
the K3 SoC family boots from an R5 SPL, which may pass bank information
based on gd->bd->bi_dram to fdt_fixup_memory_banks() etc., so PHYS_64BIT
is needed for fixing up the upper bank).
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
ti_sci->version.firmware_revision, fw_desc);
}
-void mmr_unlock(phys_addr_t base, u32 partition)
+void mmr_unlock(uintptr_t base, u32 partition)
{
/* Translate the base address */
- phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
+ uintptr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
/* Unlock the requested partition if locked using two-step sequence */
writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
void k3_sysfw_print_ver(void);
void spl_enable_dcache(void);
-void mmr_unlock(phys_addr_t base, u32 partition);
+void mmr_unlock(uintptr_t base, u32 partition);
bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
enum k3_device_type get_device_type(void);
void ti_secure_image_post_process(void **p_image, size_t *p_size);