x86: Reduce mrccache record alignment size

At present the records are 4KB in size. This is unnecessarily large when
the SPI-flash erase size is 256 bytes. Reduce it so it will be more
efficient with Apollo Lake's 24-byte variable-data record.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/include/asm/mrccache.h b/arch/x86/include/asm/mrccache.h
index 40fda856ff47f9fcce92ecc2faf4b95eb833998a..abf581822375d3ad8cd5ec157f28883fdf1bc0b7 100644 (file)
--- a/arch/x86/include/asm/mrccache.h
+++ b/arch/x86/include/asm/mrccache.h
@@ -7,7 +7,7 @@
 #ifndef _ASM_MRCCACHE_H
 #define _ASM_MRCCACHE_H
 
-#define MRC_DATA_ALIGN         0x1000
+#define MRC_DATA_ALIGN         0x100
 #define MRC_DATA_SIGNATURE     (('M' << 0) | ('R' << 8) | \
                                 ('C' << 16) | ('D'<<24))