ARM64: zynqmp: Adjust to new SMC interface to get silicon version

The new FW interface returns the IDCODE and version register, leaving
extracting bitfields to the caller.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index ba4dfbb4762530d37120905a6ae6d834b60163ca..b0acaa5b772105bb628925a346736145f42f81f4 100644 (file)
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -86,6 +86,17 @@ static int chip_id(void)
 
        smc_call(&regs);
 
+       /*
+        * SMC returns:
+        * regs[0][31:0]  = status of the operation
+        * regs[0][63:32] = CSU.IDCODE register
+        * regs[1][31:0]  = CSU.version register
+        */
+       regs.regs[0] = upper_32_bits(regs.regs[0]);
+       regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
+                       ZYNQMP_CSU_IDCODE_SVD_MASK;
+       regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
+
        return regs.regs[0];
 }
 

diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 542ace9a03b9b6d9262bc64b0191c758e28cb500..fb5200ec84a615db9d791e59381e8d4f3062b673 100644 (file)
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -16,6 +16,12 @@
 #define ZYNQMP_FPGA_OP_LOAD                    (1 << 1)
 #define ZYNQMP_FPGA_OP_DONE                    (1 << 2)
 
+#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT    15
+#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK     (0xf << \
+                                       ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
+#define ZYNQMP_CSU_IDCODE_SVD_SHIFT    12
+#define ZYNQMP_CSU_IDCODE_SVD_MASK     (0xe << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
+
 extern struct xilinx_fpga_op zynqmp_op;
 
 #define XILINX_ZYNQMP_DESC \