ARM: dts: stm32: Add DHSOM based DRC02 board

Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d573cc6e0ff17cb508e61b97975ce5d0d0f81b97..ef36ebd149ec780e3662e501b00e13a1fa509bd4 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -938,6 +938,7 @@ dtb-$(CONFIG_STM32MP15x) += \
        stm32mp157c-ed1.dtb \
        stm32mp157c-ev1.dtb \
        stm32mp157c-odyssey.dtb \
+       stm32mp15xx-dhcom-drc02.dtb \
        stm32mp15xx-dhcom-pdk2.dtb \
        stm32mp15xx-dhcor-avenger96.dtb
 

diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-drc02-u-boot.dtsi
new file mode 100644 (file)
index 0000000..f83cfe9
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp15xx-dhcom-u-boot.dtsi"

diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
new file mode 100644 (file)
index 0000000..5a237a3
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp15xx-dhcom.dtsi"
+
+/ {
+       model = "DH Electronics STM32MP15xx DHCOM DRC02";
+       compatible = "dh,stm32mp15xx-dhcom-drc02", "st,stm32mp1xx";
+
+       aliases {
+               serial0 = &uart4;
+               serial1 = &usart3;
+               serial2 = &uart8;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+};
+
+&adc {
+       status = "disabled";
+};
+
+&dac {
+       status = "disabled";
+};
+
+&gpiob {
+       /*
+        * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
+        * GPIO line, however the STM32 UART driver assumes RX happens
+        * during TX anyway and that it only controls drive enable DE
+        * line. Hence, the RX is always enabled here.
+        */
+       usb-hub {
+               gpio-hog;
+               gpios = <8 GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "rs485-rx-en";
+       };
+};
+
+&gpiod {
+       gpio-line-names = "", "", "", "",
+                         "", "", "", "",
+                         "", "", "", "Out1",
+                         "Out2", "", "", "";
+};
+
+&gpioi {
+       gpio-line-names = "In1", "", "", "",
+                         "", "", "", "",
+                         "In2", "", "", "",
+                         "", "", "", "";
+
+       /*
+        * NOTE: The USB Hub on the DRC02 needs a reset signal to be
+        * pulled high in order to be detected by the USB Controller.
+        * This signal should be handled by USB power sequencing in
+        * order to reset the Hub when USB bus is powered down, but
+        * so far there is no such functionality.
+        */
+       usb-hub {
+               gpio-hog;
+               gpios = <2 GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "usb-hub-reset";
+       };
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c2_pins_a>;
+       i2c-scl-rising-time-ns = <185>;
+       i2c-scl-falling-time-ns = <20>;
+       status = "okay";
+       /* spare dmas for other usage */
+       /delete-property/dmas;
+       /delete-property/dma-names;
+       status = "okay";
+
+       eeprom@50 {
+               compatible = "atmel,24c04";
+               reg = <0x50>;
+               pagesize = <16>;
+       };
+};
+
+&i2c5 {        /* TP7/TP8 */
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c5_pins_a>;
+       i2c-scl-rising-time-ns = <185>;
+       i2c-scl-falling-time-ns = <20>;
+       status = "okay";
+       /* spare dmas for other usage */
+       /delete-property/dmas;
+       /delete-property/dma-names;
+};
+
+&sdmmc3 {
+       /*
+        * On DRC02, the SoM does not have SDIO WiFi. The pins
+        * are used for on-board microSD slot instead.
+        */
+       /delete-property/broken-cd;
+       cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+       disable-wp;
+};
+
+&spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi1_pins_a>;
+       cs-gpios = <&gpioz 3 0>;
+       /* Use PIO for the display */
+       /delete-property/dmas;
+       /delete-property/dma-names;
+       status = "disabled";    /* Enable once there is display driver */
+       /*
+        * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
+        * also connected to the display board connector.
+        */
+};
+
+&usart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&usart3_pins_a>;
+       status = "okay";
+};
+
+/*
+ * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
+ *       however the STM32MP1 pinmux cannot map them to UART4 .
+ */
+
+&uart8 {       /* RS485 */
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart8_pins_a>;
+       rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&usbh_ehci {
+       phys = <&usbphyc_port0>;
+       status = "okay";
+};
+
+&usbphyc {
+       status = "okay";
+};
+
+&usbphyc_port0 {
+       phy-supply = <&vdd_usb>;
+       vdda1v1-supply = <&reg11>;
+       vdda1v8-supply = <&reg18>;
+};